
XRT72L74
FOUR CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER
REV. P1.0.0
á
PRELIMINARY
74
T
ABLE
57:
PMON T
RANSMIT
I
DLE
C
ELL
C
OUNT
- MSB
R
EGISTER
56 PMON T
RANSMIT
I
DLE
C
ELL
C
OUNT
- MSB H
EX
A
DDRESS
: 0
X
38
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
Tx Idle Cell Count High-
byte
RUR
0x00
This Reset-upon-Read register, along with PMON Transmit Idle Cell Count -
LSB contains the 16 bit value for the total number of Idle cells that have been
trnasmitted by the Transmit Cell Processor, since the last read of this regis-
ter. This register contains the “High” byte value of this 16-bit expression.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in the “ATM UNI” Mode.
T
ABLE
58:
PMON T
RANSMIT
I
DLE
C
ELL
C
OUNT
- LSB
R
EGISTER
57 PMON T
RANSMIT
I
DLE
C
ELL
C
OUNT
- LSB H
EX
A
DDRESS
: 0
X
39
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
Tx Idle Cell Count Low-
byte
RUR
0x00
This Reset-upon-Read register, along with PMON Transmit Idle Cell Count -
MSB contains the 16 bit value for the total number of Idle cells that have
been trnasmitted by the Transmit Cell Processor, since the last read of this
register. This register contains the “Low” byte value of this 16-bit expression.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in the “ATM UNI” Mode.
T
ABLE
59:
PMON T
RANSMIT
V
ALID
C
ELL
C
OUNT
- MSB
R
EGISTER
58 PMON T
RANSMIT
V
ALID
C
ELL
C
OUNT
- MSB H
EX
A
DDRESS
: 0
X
3A
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
Tx Valid Cell Count High-
byte
RUR
0x00
This Reset-upon-Read register, along with PMON Transmit Valid Cell Count -
LSB contains the 16 bit value for the total number of Valid cells that have
been trnasmitted by the Transmit Cell Processor, since the last read of this
register. This register contains the “High” byte value of this 16-bit expres-
sion.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in the “ATM UNI” Mode.
T
ABLE
60:
PMON T
RANSMIT
V
ALID
C
ELL
C
OUNT
- LSB
R
EGISTER
59 PMON T
RANSMIT
V
ALID
C
ELL
C
OUNT
- LSB H
EX
A
DDRESS
: 0
X
3B
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
Tx Valid Cell Count Low-
byte
RUR
0x00
This Reset-upon-Read register, along with PMON Transmit Valid Cell Count -
MSB contains the 16 bit value for the total number of Valid cells that have
been trnasmitted by the Transmit Cell Processor, since the last read of this
register. This register contains the “Low” byte value of this 16-bit expression.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in the “ATM UNI” Mode.