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XRT72L74
FOUR CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER
PRELIMINARY
REV. P1.0.0
17
Test and Diagnostic
U2
TCK
I
Test Clock:
Boundry Scan clock input.
N
OTE
:
This input pin should be pulled “Low” for normal operation.
Test Data In:
Boundry Scan Test data input.
N
OTE
:
This input pin should be pulled “Low” for normal operation.
U1
TDI
I
V3
TDO
O
Test Data Out:
Boundry Scan test data output.
V1
TestMode
***
Factory Test Mode Pin:
The user should tie this pin to ground.
T4
TMS
I
Test Mode Select:
Boundary Scan Mode Select input pin.
This input pin should be pulled “Low” for normal operation.
U3
TRST
I
Test Mode Reset:
Boundary Scan Mode Reset input pin.
N
OTE
:
This input pin should be pulled "low" for normal operation.
Line Interface Drive and Scan
C13
B13
A13
B12
DMO_0
DMO_1
DMO_2
DMO_3
I
“Drive Monitor Output” Input (from the XRT73L04 LIU IC):
This input pin is intended to be tied to the DMO output pin of the XRT73L04 E3/
DS3/STS-1 LIU IC. The user can determine the state of this input pin by reading
Bit 2 (DMO) within the Line Interface Scan Register (Address = 0x73). If this input
signal is “High”, then it means that the drive monitor circuitry (within the XRT73L04
LIU IC) has not detected any bipolar signals at the MTIP and MRING inputs within
the last 128 ± 32 bit-periods. If this input signal is “Low”, then it means that bipolar
signals are being detected at the MTIP and MRING input pins of the XRT73L04
device.
N
OTE
:
If the designer is not using the XRT73L04 E3/DS3/STS-1 LIU IC, then this
input pin can be used for other purposes.
R4
T3
T2
T1
GPIO_0
GPIO_1
GPIO_2
GPIO_3
I/O
General Purpose Input/Output pins:
Each of these pin can be configured to function as either input or output pins. If a
given pin is configured to function as an Input pin, then the state of this input pin
can be monitored by reading Bit X within the "XXX" Register (Address Location =
0x###).
If a given pin is configured to function as a Output pin, then the state of this output
pin can be controlled by writing the appropriate value into Bit X within the "XXX"
Register.
A5
D5
C4
A4
LLOOP_0
LLOOP_1
LLOOP_2
LLOOP_3
O
Local Loop-back Output Pin (to the XRT73L04 E3/DS3/STS-1 LIU IC):
This output pin is intended to be connected to the LLOOP input pin of the
XRT73L04 LIU IC. This input pin, along with “RLOOP” permits the user to config-
ure the XRT73L04 LIU IC to operate in either of the following three (3) loop-back
modes.
Analog Local Loop-Back Mode
Digital Local Loop-Back Mode
Remote Loop-Back Mode.
For a detailed description on how to configure the XRT73L04 to operate in each of
these loop-back modes, please see Section _.
Writing a “1” to bit 1 of the “Line Interface Drive Register” (Address = 0x72) will
cause this output pin to toggle “High”. Writing a “0” to this bit-field will cause the
RLOOP output to toggle “Low”.
N
OTE
:
If the user is not using the XRT73L04 DS3/E3/STS-1 LIU IC, then this out-
put pin can be used for other purposes.
PIN DESCRIPTIONS
P
IN
#
N
AME
T
YPE
D
ESCRIPTION