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XRT72L74
FOUR CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER
PRELIMINARY
REV. P1.0.0
79
T
ABLE
74:
T
X
PLCP FA2 B
YTE
E
RROR
M
ASK
R
EGISTER
R
EGISTER
73 T
X
PLCP FA2 B
YTE
E
RROR
M
ASK
R
EGISTER
H
EX
A
DDRESS
: 0
X
49
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
FA2 Error Mask
R/W
0x00
The Transmit PLCP Processor block always XORs contents of this register
with the contents of the FA2 byte (within a PLCP frame). This “XORed” value
is then written back into the “FA1” byte field, within each “outbound” PLCP
Frame; prior to transmission. Setting any of these bit-fields to “1” introduces
error in that specific bit, within each “outbound” FA1 byte.
Register must be set to 0x00 for normal operation,
N
OTE
:
This bit-field is only active if the XRT72L74 is operating in both the
“ATM UNI” and the “PLCP” Modes.
T
ABLE
75:
T
X
PLCP BIP-8 E
RROR
M
ASK
R
EGISTER
74 T
X
PLCP BIP-8 E
RROR
M
ASK
H
EX
A
DDRESS
: 0
X
4A
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
B1 Error Mask
R/W
0x00
The Transmit PLCP Processor block always XORs contents of this register
with the contents of the B1 byte (within a PLCP frame). This “XORed” value
is then written back into the “B1” byte field, within each “outbound” PLCP
Frame; prior to transmission. Setting any of these bit-fields to “1” introduces
error in that specific bit, within each “outbound” B1 byte.
Register must be set to 0x00 for normal operation,
N
OTE
:
This bit-field is only active if the XRT72L74 is operating in both the
“ATM UNI” and the “PLCP” Modes.
T
ABLE
76:
T
X
PLCP G1 B
YTE
R
EGISTER
R
EGISTER
75 T
X
PLCP G1 B
YTE
R
EGISTER
H
EX
A
DDRESS
: 0
X
4B
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-5
Unused
RO
0
4
Tx PLCP FEBE Mask
R/W
0
0: FEBE Count is transmitted, based upon B1 Byte Error conditions, as
detected by the Receive PLCP Processor.
1: FEBE is transmitted as 0000
N
OTE
:
This bit-field is only active if the XRT72L74 is operating in both the
“ATM UNI” and the “PLCP” Modes.
3
Force PLCP Yellow Alarm
R/W
0
0: PLCP Yellow Alarm generated from Receive PLCP Processor.
1: PLCP Yellow Alarm is Forced.
N
OTE
:
This bit-field is only active if the XRT72L74 is operating in both the
“ATM UNI” and the “PLCP” Modes.
2
LSS(2)
R/W
0
Link Status Signal may be programmed by user
1
LSS(1)
R/W
0
0
LSS(0)
R/W0
0