參數(shù)資料
型號： XRT72L74
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 70/104頁
文件大?。?/td> 1301K
代理商： XRT72L74
XRT72L74
FOUR CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER
REV. P1.0.0
á
PRELIMINARY
70
T
ABLE
42:
PMON PLCP BIP-8 E
RROR
C
OUNT
R
EGISTER
- LSB
R
EGISTER
41 PMON PLCP BIP-8 E
RROR
C
OUNT
R
EGISTER
- LSB H
EX
A
DDRESS
: 0
X
29
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
PLCP BIP Error Count
Low-byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON PLCP BIP-8 Error
Count Register - MSB” contains the 16 bit value for the total number of PLCP
BIP-8 Errors that have been detected since the last read of this register. This
register contains the “Low” bye value of this 16-bit expression.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in both the “ATM UNI” and “PLCP” Modes.
T
ABLE
43:
PMON PLCP F
RAMING
B
YTE
E
RROR
C
OUNT
R
EGISTER
- MSB
R
EGISTER
42 PMON PLCP F
RAMING
B
YTE
E
RROR
C
OUNT
R
EGISTER
- MSB H
EX
A
DDRESS
: 0
X
2A
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
PLCP FA Error Count High-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON PLCP FA Error Count
Register - LSB” contains the 16 bit value for the total number of PLCP Fram-
ing (e.g, FA1 or FA2) byte errors that have been detected since the last read
of this register. This register contains the “High” byte value of this 16-bit
expression.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in both the “ATM UNI” and “PLCP” Modes.
T
ABLE
44:
PMON PLCP F
RAMING
B
YTE
E
RROR
C
OUNT
R
EGISTER
- LSB
R
EGISTER
43 PMON PLCP F
RAMING
B
YTE
E
RROR
C
OUNT
R
EGISTER
- LSB H
EX
A
DDRESS
: 0
X
2B
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
PLCP FA Error Count Low-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON PLCP FA Error Count
Register - MSB” contains the 16 bit value for the total number of PLCP Fram-
ing (e.g, FA1 or FA2) byte errors that have been detected since the last read
of this register. This register contains the “Low” byte value of this 16-bit
expression.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in both the “ATM UNI” and “PLCP” Modes.
T
ABLE
45:
PMON PLCP FEBE C
OUNT
R
EGISTER
- MSB
R
EGISTER
44 PMON PLCP FEBE C
OUNT
R
EGISTER
- MSB H
EX
A
DDRESS
: 0
X
2C
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-0
PLCP FEBE Count High-
byte
RUR
0x00
This “Reset-upon-Read” register, along with “PMON PLCP FEBE Count
Register - LSB” contains the 16 bit value for the total number of PLCP FEBE
(Far-End Block Error) events that have been detected since the last read of
this register. This register contains the “High” byte value of this 16-bit
expression.
N
OTE
:
This register is only active if the XRT72L74 has been configured to
operate in both the “ATM UNI” and “PLCP” Modes.
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XRT7300IV-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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