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參數(shù)資料
| 型號： | XRT72L74 |
| 廠商： | Exar Corporation |
| 元件分類： | 通信及網絡 |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 25/104頁 |
| 文件大?。?/td> | 1301K |
| 代理商： | XRT72L74 |
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XRT72L74
FOUR CHANNEL, DS3 ATM UNI/CLEAR-CHANNEL FRAMER
PRELIMINARY
REV. P1.0.0
25
Tx PLCP Processor
G1
H3
H2
H1
8KRef_0
8KRef_1
8KRef_2
8KRef_3
I
8 kHz Reference Clock Input for the PLCP Processors:
The Transmit PLCP processor can be configured to synchronize its PLCP frame
processing to this clock signal. The Transmit PLCP Processor will also use this
signal to compute the trailer nibble stuff opportunities.
N
OTES
:
1. This input signal is active only if the user has configured the PLCP Pro-
cessors to use this signal as their “master clock” signal. The user can con-
figure the UNI to use this signal by setting TimRefSel[1,0] (within the UNI
Operating Mode Register) to 01.
2. The user should tie this pin to “GND” whenever the XRT72L74 has been
configured to operate in the “Clear-Channel-Framer” Mode.
B9
A9
D9
B8
EncoDis_0
EncoDis_1
EncoDis_2
EncoDis_3
O
Encoder (B3ZS) Disable Output pin (intended to be connected to the
XRT73L04 E3/DS3/STS-1 LIU IC):
This output pin is intended to be connected to the EncoDis input pin of the
XRT73L04 LIU IC. The user can control the state of this output pin by writing a “0”
or “1” to Bit 3 (EncoDis) of the Line Interface Driver Register (Address = 0x72). If
the user commands this signal to toggle “High” then it will disable the B3ZS
encoder circuitry within the XRT73L04 IC. Conversely, if the user commands this
output signal to toggle “Low”, then the B3ZS Encoder circuitry, within the
XRT73L04 IC will be enabled.
Writing a “1” to Bit 3 of the Line Interface Driver Register (Address = 0x72) will
cause this output pin to toggle “High”. Writing a “0” to this bit-field will cause this
output pin to toggle “Low”.
N
OTES
:
1. The user is advised to disable the B3ZS encoder (within the XRT73L04 IC) if
the Tansmit and Receive DS3 Framers (within the UNI) are configured to
operate in the B3ZS line code.
2. If the designer is not using the XRT73L04 DS3/E3/STS-1 Line Transmitter
IC, then output pin can be used for other purposes.
External PLCP Frame Stuff Control:
This input allows the user to externally exercise or forego trailer nibble stuffing
opportunities by the Transmit PLCP Processor. PLCP trailer nibble stuff opportuni-
ties occur in periods of three PLCP frames (375μs). The first PLCP frame (first
within a “stuff opportunity” period) will have 13 trailer nibbles appended to it. The
second PLCP frame (second within a “stuff opportunity” period) will have 14 trailer
nibbles appended to it. The third PLCP frame (the location of the stuff opportunity)
will contain 13 trailer nibbles if the StuffCtl input is “Low” and 14 trailer nibbles is
the StuffCtl input is “High”.
N
OTE
:
The user should tie this input pin to “GND” whenever the XRT72L74 has
been configured to operate in the “Clear-Channel-Framer” Mode.
K3
K2
K1
L3
StuffCtl_0
StuffCtl_1
StuffCtl_2
StuffCtl_3
I
PIN DESCRIPTIONS
P
IN
#
N
AME
T
YPE
D
ESCRIPTION
相關PDF資料 |
PDF描述 |
|---|---|
| XRT7300IV | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT7300 | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT7302 | 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元) |
| XRT73L02M | TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73L02MIV | TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XRT72L74IB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| XRT7300 | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT7300ES | 功能描述:網絡控制器與處理器 IC RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT7300IV | 功能描述:外圍驅動器與原件 - PCI . . RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT7300IV-F | 功能描述:外圍驅動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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