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| 型號： | TSB81BA3I |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER |
| 中文描述： | 的IEEE 1394b三端口電纜收發(fā)器/仲裁者 |
| 文件頁數(shù)： | 48/57頁 |
| 文件大小： | 810K |
| 代理商： | TSB81BA3I |
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SLLS559B DECEMBER 2002 REVISED OCTOBER 2003
48
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION (1394B INTERFACE)
status transfer (continued)
PHY status transfers use the PINT terminal to serially send status information to the LLC as shown in Figure 23.
PHY status transfers (Table 33) can occur at any time during normal operation. The PHY uses the
PHY_INTERRUPT PHY status transfer when required to interrupt the LLC due to a configuration timeout, a
cable power failure, a port interrupt, or an arbitration timeout. When transferring PHY register contents, the PHY
uses either the solicited or the unsolicited register read status transfer. The unsolicited register 0 contents are
passed to the LLC only during initialization of the serial bus. After any PHY-link interface initialization, the PHY
sends a PHY status transfer indicating whether or not a bus reset occurred during the inactive period of the
PHY-link interface. If the PHY receives an illegal request from the LLC, then the PHY issues an
INTERFACE_ERROR PHY status transfer.
Each cell represents one clock sample time, and n is the number of bits in the request stream.
LR1
LR2
LR3
LR (n-2)
LR0
LR (n-1)
Figure 23. PINT (PHY Interrupt) Stream
Table 33. PHY Status Transfer Encoding
PI[1:3]
NAME
DESCRIPTION
NUMBER OF BITS
000
NOP
No status indication
5
001
PHY_INTERRUPT
Interrupt indication: configuration timeout, cable power failure, port event
interrupt, or arbitration state machine timeout
5
010
PHY_REGISTER_SOL
Solicited PHY register read
17
011
PHY_REGISTER_UNSOL
Unsolicited PHY register read
17
100
PH_RESTORE_NO_RESET
PHY-link interface initialized; no bus resets occurred
5
101
PH_RESTORE_RESET
PHY-link interface initialized; a bus reset occurred
5
110
INTERFACE_ERROR
PHY received illegal request
5
111
Reserved
Reserved
Reserved
Most PHY status transfers are 5 bits long. The transfer consists of a start bit (always 1), followed by a request
type (see Table 33), and lastly followed by a stop bit (always 0). The only exception is when the transfer of a
register contents occurs. Solicited and unsolicited PHY register read transfers are 17 bits long and include the
additional information of the register address and the data contents of the register (see Table 34).
Table 34. Register Read (Solicited and Unsolicited) PHY Status Transfer Encoding
BIT(s)
NAME
DESCRIPTION
0
Start bit
Indicates the beginning of the transfer (always 1)
13
Request type
A 010 or a 011 indicates a solicited or unsolicited register contents transfer
47
Address
Identifies the address of the PHY register whose contents are being transferred
815
Data
The contents of the register specified in bits 4 through 7
16
Stop bit
Indicates the end of the transfer (always 0)
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相關代理商/技術參數(shù) |
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|---|---|
| TSB81BA3IPFP | 功能描述:射頻收發(fā)器 s800 3-Port Cable Xcvr/Arbiter RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| TSB81BA3IPFPEP | 功能描述:射頻收發(fā)器 Mil Enh 3-Port Cable Xcvr/Arbiter RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| TSB81BA3PFP | 功能描述:射頻收發(fā)器 s800 3-Port Cable Xcvr/Arbiter RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| TSB81BA3PFPG4 | 功能描述:射頻收發(fā)器 s800 3-Port Cable Xcvr/Arbiter RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| TSB82AA2 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:1394b OHCI-LYNX CONTROLLER |
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