參數(shù)資料
型號(hào)： TSB81BA3I
廠商： Texas Instruments, Inc.
英文描述： IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER
中文描述： 的IEEE 1394b三端口電纜收發(fā)器/仲裁者
文件頁(yè)數(shù)： 43/57頁(yè)
文件大?。?/td> 810K
代理商： TSB81BA3I
SLLS559B DECEMBER 2002 REVISED OCTOBER 2003
43
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION (1394B INTERFACE)
The TSB81BA3 normally controls the CTL0CTL1 and D0D7 bidirectional buses. The LLC is allowed to drive
these buses only after the LLC has been granted permission to do so by the PHY.
There are four operations that may occur on the PHY-LLC interface: link service request, status transfer, data
transmit, and data receive. The LLC issues a service request to read or write a PHY register or to request the
PHY to gain control of the serial-bus in order to transmit a packet.
The PHY may initiate a status transfer either autonomously or in response to a register read request from the
LLC.
The PHY initiates a receive operation whenever a packet is received from the serial-bus.
The PHY initiates a transmit operation after winning control of the serial-bus following a bus-request by the LLC.
The transmit operation is initiated when the PHY grants control of the interface to the LLC.
Table 22 and Table 23 show the encoding of the CTL0CTL1 bus.
Table 22. CTL Encoding When PHY Has Control of the Bus
CTL0
CTL1
NAME
DESCRIPTION
0
0
Idle
No activity (this is the default mode)
0
1
Status
Status information is being sent from the PHY to the LLC.
1
0
Receive
An incoming packet is being sent from the PHY to the LLC.
1
1
Grant
The LLC has been given control of the bus to send an outgoing packet.
Table 23. CTL Encoding When LLC Has Control of the Bus
CTL0
CTL1
NAME
DESCRIPTION
0
0
Idle
The LLC releases the bus (transmission has been completed).
0
1
Transmit
An outgoing packet is being sent from the LLC to the PHY.
1
0
Reserved
Reserved
1
1
Hold/More
Information
The LLC is holding the bus while data is being prepared for transmission, or the LLC is sending a request to
arbitrate for access to the bus, or the LLC is identifying the end of a subaction gap to the PHY.
LLC service request
To request access to the bus, to read or write a PHY register, or to send a link notification to PHY, the LLC sends
a serial bit stream on the LREQ terminal as shown in Figure 21.
Each cell represents one clock sample time, and n is the number of bits in the request stream.
LR1
LR2
LR3
LR (n-2)
LR0
LR (n-1)
Figure 21. LREQ Request Stream
The length of the stream varies depending on the type of request as shown in Table 24.
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TSB82AA2 制造商:TI 制造商全稱:Texas Instruments 功能描述:1394b OHCI-LYNX CONTROLLER
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