參數(shù)資料
型號: TSB81BA3I
廠商: Texas Instruments, Inc.
英文描述: IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER
中文描述: 的IEEE 1394b三端口電纜收發(fā)器/仲裁者
文件頁數(shù): 30/57頁
文件大?。?/td> 810K
代理商: TSB81BA3I
SLLS559B DECEMBER 2002 REVISED OCTOBER 2003
30
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION (1394a2000 INTERFACE)
LLC service request (continued)
The length of the stream varies depending on the type of request as shown in Table 12.
Table 12. Request Stream Bit Length
REQUEST TYPE
NUMBER OF BITS
Bus request
7 or 8
Read register request
9
Write register request
17
Acceleration control request
6
Regardless of the type of request, a start bit of 1 is required at the beginning of the stream, and a stop bit of 0
is required at the end of the stream. The second through fourth bits of the request stream indicate the type of
the request. In the descriptions below, bit 0 is the most significant and is transmitted first in the request bit stream.
The LREQ terminal is normally low.
Table 13 shows the encoding for the request type.
Table 13. Request Type Encoding
LR1LR3
NAME
DESCRIPTION
000
ImmReq
Immediate bus request. Upon detection of idle, the PHY takes control of the bus immediately without arbitration.
001
IsoReq
Isochronous bus request. Upon detection of idle, the PHY arbitrates for the bus without waiting for a subaction gap.
010
PriReq
Priority bus request. The PHY arbitrates for the bus after a subaction gap, ignores the fair protocol.
011
FairReq
Fair bus request. The PHY arbitrates for the bus after a subaction gap, follows the fair protocol.
100
RdReg
The PHY returns the specified register contents through a status transfer
101
WrReg
Write to the specified register
110
AccelCtl
Enable or disable asynchronous arbitration acceleration
111
Reserved
Reserved
For a bus request, the length of the LREQ bit stream is 7 or 8 bits as shown in Table 14.
Table 14. Bus Request
BIT(s)
NAME
DESCRIPTION
0
Start bit
Indicates the beginning of the transfer (always 1)
13
Request type
Indicates the type of bus request. See Table 13.
46
Request speed
Indicates the speed at which the PHY sends the data for this request. See Table 15 for the encoding of this field.
7
Stop bit
Indicates the end of the transfer (always 0). If bit 6 is 0, then this bit may be omitted.
Table 15 shows the 3-bit request speed field used in bus requests.
Table 15. Bus Request Speed Encoding
LR4LR6
DATA RATE
000
S100
010
S200
100
S400
All Others
Invalid
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