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參數(shù)資料
| 型號： | TNETA1600 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | SONET/SDH ATM Receiver/Transmitter for 622.08-Mit/s or 155.52-Mbit/s Operation(SONET/SDH ATM接收器/傳送器) |
| 中文描述： | SONET / SDH的自動柜員機(jī)接收器/發(fā)送器為622.08，麻省理工學(xué)院/ s或155.52 - Mbit / s的操作（SONET / SDH的自動柜員機(jī)接收器/傳送器） |
| 文件頁數(shù)： | 4/54頁 |
| 文件大?。?/td> | 1120K |
| 代理商： | TNETA1600 |
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TNETA1600
SONET/SDH ATM RECEIVER/TRANSMITTER
FOR 622.08-MBIT/S OR 155.52-MBIT/S OPERATION
SDNS036 – FEBRUARY 1996
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
line-side parallel interface
TERMINAL
NAME
I/O
DESCRIPTION
NO.
RPD0–RPD7
I
Receive parallel data. This byte-wide data is clocked into the TNETA1600 on low-to-high transitions of
RPCK. Bit 7 is the most-significant bit.
RPCK
I
Receive parallel clock. Data on RPD0–RPD7 is clocked into the TNETA1600 on low-to-high transitions of
RPCK. The frequency of RPCK is nominally 77.76 MHz for 622.08-Mbit/s operation or 19.44 MHz for
155.52-Mbit/s operation.
TPCK
I
Transmit-parallel clock. Data is clocked out of the TNETA1600 on TPD0–TPD7 on low-to-high transitions
of TPCK. The frequency of TPCK is 77.76 MHz for 622.08-Mbit/s operation or 19.44 MHz for 155.52-Mbit/s
operation.
TPD0–TPD7
O
Transmit-parallel data. This byte-wide data is clocked out of the TNETA1600 on low-to-high transitions of
TPCK and is accompanied by a return clock (RTNCK). TPD0–TPD7 is valid on low-to-high transitions of
RTNCK. Bit 7 is the most-significant bit.
RTNCK
O
Return clock. RTNCK is a retimed version of TPCK that accompanies data output on TPD0–TPD7.
TPD0–TPD7 is valid on the rising edge of RTNCK.
alarm indicators
TERMINAL
NAME
I/O
DESCRIPTION
NO.
LOCA
O
Loss-of-cell alignment. LOCA goes high when seven consecutive ATM cell slots occur with a mismatch
between the calculated header-error check (HEC) byte and the fifth byte of the ATM header, indicating
invalid ATM headers. LOCA goes low when valid ATM headers are detected in seven consecutive cell slots.
LOF
O
Loss of frame. LOF goes high when an out-of-frame (OOF) condition persists for 3 ms. LOF goes low when
the OOF condition is cleared for 1 ms.
LOSRD
O
Loss-of-receive data. LOSRD goes high when the receive output FIFO overflows, resulting in a loss of data.
The receive output FIFO can store a maximum of three complete ATM cells. If a cell is not extracted on the
receive output before additional cells arrive on the receive input, the arriving cells are discarded.
OOF
O
Out of frame. OOF goes high when four consecutive erred framing patterns are received. OOF goes low
when two successive error-free framing patterns are received.
P
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| TNETA1600PCM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ATM/SONET FRAMER|QFP|160PIN|PLASTIC |
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| TNETA1622 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:622.08-MHz CLOCK-RECOVERY DEVICE |
| TNETA1622DW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clock/Data Recovery |
| TNETA1630DW | 制造商:Texas Instruments 功能描述: |
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