參數(shù)資料
型號： TNETA1600
廠商： Texas Instruments, Inc.
英文描述： SONET/SDH ATM Receiver/Transmitter for 622.08-Mit/s or 155.52-Mbit/s Operation(SONET/SDH ATM接收器/傳送器)
中文描述： SONET / SDH的自動柜員機接收器/發(fā)送器為622.08，麻省理工學(xué)院/ s或155.52 - Mbit / s的操作（SONET / SDH的自動柜員機接收器/傳送器）
文件頁數(shù)： 11/54頁
文件大?。?/td> 1120K
代理商： TNETA1600
TNETA1600
SONET/SDH ATM RECEIVER/TRANSMITTER
FOR 622.08-MBIT/S OR 155.52-MBIT/S OPERATION
SDNS036 – FEBRUARY 1996
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Table 1. Transmit Overhead
OVERHEAD
BYTE
SONET-FRAME
VALUE INITIALIZED AT RESET
OR FRAME-MODE CHANGE
SDH-FRAME
VALUE INITIALIZED AT RESET
OR FRAME-MODE CHANGE
VALUE
OVER-
WRITTEN
EACH
FRAME
A1
1111 0110 (F6 hex)
1111 0110 (F6 hex)
Y
A2
0010 1000 (28 hex)
0010 1000 (28 hex)
Y
C1/1
0000 0001
0000 0001
N
C1/2
0000 0010
0000 0010 (0000 0000 for 155.52-Mbit/s mode)
N
C1/3
C1/4
C1/5
C1/6
C1/7
C1/8
C1/9
C1/10
C1/11
C1/12
0000 0011
0000 0011 (0000 0000 for 155.52-Mbit/s mode)
N
0000 0100
0000 0000
N
0000 0101
0000 0000
N
0000 0110
0000 0000
N
0000 0111
0000 0000
N
0000 1000
0000 0000
N
0000 1001
0000 0000
N
0000 1010
0000 0000
N
0000 1011
0000 0000
N
0000 1100
0000 0000
N
B1
Calculated from previous frame
Calculated from previous frame
Y
E1
0111 1111
0111 1111
N
F1
0000 0000
0000 0000
N
D1–D3
0111 1111
0111 1111
N
First H1
Normal operation: 0110 0010
Path AIS: 1111 1111
Normal operation: 1001 0011
Path AIS: 1111 1111
Normal operation: 0000 1010
Path AIS: 1111 1111
Normal operation: 1111 1111
Path AIS: 1111 1111
Normal operation: 0110 1010
Path AIS: 1111 1111
Normal operation: 1001 1011
Path AIS: 1111 1111
Normal operation: 0000 1010
Path AIS: 1111 1111
Normal operation: 1111 1111
Path AIS: 1111 1111
Y
H1
N
First H2
Y
H2
N
H3
Normal operation: 0000 0000
Path AIS: 1111 1111
Calculated from previous frame
Normal operation: 0000 0000
Path AIS: 1111 1111
Calculated from previous frame
N
B2
Y
K1
0000 0000
0000 0000
N
First K2
Normal operation: 0000 0000
Line AIS: 1111 1111
Line FERF: 0000 0110
Normal operation: 0000 0000
Line AIS: 1111 1111
Line FERF: 0000 0110
Bits 1–5: N
Bits 6–8: Y§
D4–D12
0111 1111
0111 1111
N
Z1/1–Z1/3
Z1/4–Z1/12
0000 0000
0000 0000
N
0000 0000
0000 0000
N
Third Z2
B2 error count; range of legal values for Z2 is:
0000 0000 – 0110 0000
0111 1111
B2 error count; range of legal values for Z2 is:
0000 0000 – 0110 0000
0111 1111
Y
E2
N
These bytes are used only in 622.08-Mbit/s applications.
For the transmission of a line AIS or path AIS, an all-ones pattern is put in the data stream in place of certain overhead bytes. The all-ones pattern
is not, however, written to or reflected in the transmit-overhead RAM. Upon deactivation of the AIS condition, the original values (still in the RAM)
are returned to the data stream.
§For the transmission of a line FERF, a 110 is put in the data stream in place of bits 6–8 of the K2 byte. These values are not, however, written
to or reflected in the transmit-overhead RAM. Upon deactivation of the line FERF condition, the original values (still in the RAM) are returned
to the data stream.
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