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參數(shù)資料
| 型號： | TNETA1600 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | SONET/SDH ATM Receiver/Transmitter for 622.08-Mit/s or 155.52-Mbit/s Operation(SONET/SDH ATM接收器/傳送器) |
| 中文描述： | SONET / SDH的自動柜員機接收器/發(fā)送器為622.08，麻省理工學(xué)院/ s或155.52 - Mbit / s的操作（SONET / SDH的自動柜員機接收器/傳送器） |
| 文件頁數(shù)： | 26/54頁 |
| 文件大小： | 1120K |
| 代理商： | TNETA1600 |
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TNETA1600
SONET/SDH ATM RECEIVER/TRANSMITTER
FOR 622.08-MBIT/S OR 155.52-MBIT/S OPERATION
SDNS036 – FEBRUARY 1996
26
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Table 6. Coding for Control Registers (Continued)
ACTION
CONTROL
REGISTER 1
(ADDRESS 007)
CONTROL
REGISTER 2
(ADDRESS 008)
CONTROL
REGISTER 3
(ADDRESS 009)
CONTROL
REGISTER 4
(ADDRESS 00A)
CONTROL
REGISTER 5
(ADDRESS 00B)
Force-transmit path RDI – 11
Enable SDH frames
Changing the state of this bit can result in the loss of any data being processed by the transmitter (see the enable SDH frames bit description).
–
–
–
xxxx 1xxx
–
–
–
–
–
xxxx xxx1
disable-error correction for receive ATM-cell headers
When set to a high level, this bit causes the error-detection and correction function to stop correcting single-bit
errors that are detected in the headers of incoming ATM cells. When a reset operation is performed, this bit is
cleared (set to 0). The normal operating state of the TNETA1600 provides single-bit error correction on the
headers of incoming ATM cells; an action must be taken to disable this operation.
disable-transmit ATM-cell header HEC-byte generation
When set to a high level, this bit causes the transmit section to stop generating the header-error-check (HEC)
byte in the 5-byte header of ATM cells being transmitted. When a reset operation occurs, this bit is cleared (set
to 0). The normal operating mode of the TNETA1600 calculates the HEC byte from the first four bytes of the
ATM cell that is transmitted and inserts the calculated value in the HEC-byte location.
enable-terminal loopback (TLB)
When set to a high level, this bit causes the ATM cells input through the transmit-cell interface to be looped
through the device and output through the receive-cell interface. In this mode, ATM cells received on the
transmit input flow normally through the transmit path to the scrambling function, where they are passed to the
framing function in the receiver. The cells are then processed through the receive path and output on
RD0–RD15. The receive input-data stream is blocked. However, the transmit section operates normally and
the device continues to transmit ATM cells inserted in a STS-3c/STM-1 or STS-12c/STM-4c frame. Internally,
this bit is logically ORed with TLB, allowing a terminal loopback to be enabled through either the external input
pin or through the control register. When a reset operation occurs, the bit in the control register is cleared.
enable facility-loopback (FLB) output
When set to a high level, this bit causes the FLB output to go active (high). The FLB output can be connected
to the FLB input on the TNETA1510/1610, and when it goes active, the TNETA1510/1610 facility loopback is
enabled. This allows the FLB function on the TNETA1510/1610 to be controlled through the controller interface
of the TNETA1600. When a reset operation occurs, the bit in the control register is cleared causing the FLB
output to be inactive.
disable the dropping of ATM cells with multiple-bit header errors
When set to a high level, this bit causes the receive section to stop dropping ATM cells that contain multiple-bit
header errors. When a reset operation occurs, this bit is cleared. The normal operation of the TNETA1600 drops
ATM cells that contain multiple-bit header errors by not placing them into the receive-output FIFO.
disable the dropping of ATM idle cells from the receive-data stream
When this bit is set, the receive section does not drop ATM idle cells from the receive-data stream. An idle cell
is defined as an ATM cell with the 5-byte header set to a value of 00 00 00 01 52 (hex). When a reset operation
occurs, this bit is cleared. The normal operation of the TNETA1600 drops idle cells from the receive-data stream.
P
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