參數(shù)資料
型號(hào)： TLIU04C1
廠商： Lineage Power
英文描述： Quad T1/E1 Line Interface(四T1/E1線接口)
中文描述： 四T1/E1線路接口（四個(gè)T1/E1線接口）
文件頁(yè)數(shù)： 84/100頁(yè)
文件大?。?/td> 1321K
代理商： TLIU04C1
Advance Data Sheet, Rev. 2
TLIU04C1 Quad T1/E1 Line Interface
April 1999
84
Lucent Technologies Inc.
Direct Logic Control Mode
(continued)
Jitter Attenuator
(continued)
Jitter Attenuator Enable
The jitter attenuator is selected using the JAR and JAT
pins. These control pins are global and affect all four
channels unless a given channel is in the powerdown
mode (PWRDN = 1). Because there is only one attenu-
ator function in the device, selection must be made
between either the transmit or receive path. If both JAT
and JAR are activated at the same time, the jitter atten-
uator will be disabled.
Note that the power consumption increases slightly on
a per-channel basis when the jitter attenuator is active.
If jitter attenuation is selected, a valid XCLK signal
must be available.
Jitter Attenuator Receive Path Enable (JAR)
When the jitter attenuator receive bit is set (JAR = 1),
the attenuator is enabled in the receive data path
between the clock/data recovery and the decoder (see
Figure 26 on page 68). Under this condition, the jitter
characteristics of the jitter attenuator apply for the
receiver. When JAR = 0, the clock/data recovery out-
puts bypass the disabled attenuator and directly enter
the decoder function. The receive path will then exhibit
the jitter characteristics shown in Figure 27 through
Figure 30.
Jitter Attenuator Transmit Path Enable (JAT)
When the jitter attenuator transmit bit is set (JAT = 1),
the attenuator is enabled in the transmit data path
between the encoder and the pulse-width controller/
pulse equalizer (see Figure 26 on page 68). Under this
condition, the jitter characteristics of the jitter attenuator
apply for the transmitter. When JAT = 0, the encoder
outputs bypass the disabled attenuator and directly
enter the pulse-width controller/pulse equalizer. The
transmit path will then pass all jitter from TCLK to line
interface outputs TTIP/TRING.
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