參數(shù)資料
型號： ST72774S9T1
廠商： 意法半導(dǎo)體
元件分類： ADC
英文描述： 8-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM, ADC, TIMER, SYNC, TMU, PWM/BRM, H/W DDC & I2C
中文描述： 8位USB單片機的顯示器，高達60K章檢察官辦公室，每1000內(nèi)存，模數(shù)轉(zhuǎn)換器，定時器，同步，材質(zhì)單元，脈寬調(diào)制/的BRM，的H / W DDC的
文件頁數(shù)： 17/144頁
文件大小： 1280K
代理商： ST72774S9T1
ST72774/ST727754/ST72734
17/144
CPU REGISTERS
(Cont’d)
Stack Pointer (SP)
Read/Write
Reset Value: 01 FFh
The Stack Pointer is a 16-bit register which is
always pointing to the next free location in the
stack. It is then decremented after data has been
pushed onto the stack and incremented before
data is popped from the stack (see
Figure 6
).
Since the stack is 256 bytes deep, the most
significant byte is forced by hardware. Following
an MCU Reset, or after a Reset Stack Pointer
instruction (RSP), the Stack Pointer contains its
reset value (the SP7 to SP0 bits are set) which is
the stack higher address.
The least significant byte of the Stack Pointer
(called S) can be directly accessed by a LD
instruction.
Note:
When the lower limit is exceeded, the Stack
Pointer wraps around to the stack upper limit,
without indicating the stack overflow. The
previously stored information is then overwritten
and therefore lost. The stack also wraps in case of
an underflow.
The stack is used to save the return address
during a subroutine call and the CPU context
during an interrupt. The user may also directly
manipulate the stack by means of the PUSH and
POP instructions. In the case of an interrupt, the
PCL is stored at the first location pointed to by the
SP. Then the other registers are stored in the next
locations as shown in
Figure 6
.
– When an interrupt is received, the SP is decre-
mented and the context is pushed on the stack.
– On return from interrupt, the SP is incremented
and the context is popped from the stack.
A subroutine call occupies two locations and an
interrupt five locations in the stack area.
Figure 6. Stack Manipulation Example
CALL
Subroutine
15
8
0
0
0
0
0
0
0
1
7
0
SP7
SP6
SP5
SP4
SP3
SP2
SP1
SP0
PCH
PCL
SP
PCH
PCL
SP
PCL
PCH
X
A
CC
PCH
PCL
SP
PCL
PCH
X
A
CC
PCH
PCL
SP
PCL
PCH
X
A
CC
PCH
PCL
SP
SP
Y
Interrupt
event
PUSH Y
POP Y
IRET
RET
or RSP
@ 01FFh
@ 0100h
Stack Higher Address = 01FFh
Stack Lower Address = 0100h
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