參數(shù)資料
型號： ST72774S9T1
廠商： 意法半導(dǎo)體
元件分類： ADC
英文描述： 8-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM, ADC, TIMER, SYNC, TMU, PWM/BRM, H/W DDC & I2C
中文描述： 8位USB單片機(jī)的顯示器，高達(dá)60K章檢察官辦公室，每1000內(nèi)存，模數(shù)轉(zhuǎn)換器，定時器，同步，材質(zhì)單元，脈寬調(diào)制/的BRM，的H / W DDC的
文件頁數(shù)： 118/144頁
文件大?。?/td> 1280K
代理商： ST72774S9T1
ST72774/ST727754/ST72734
118/144
PWM/BRM GENERATOR
(Cont’d)
BRM Generation
The BRM bits allow the addition of a pulse to widen
a standard PWM pulse for specific PWM cycles.
This has the effect of “fine-tuning” the PWM Duty
cycle (without modifying the base duty cycle), thus,
with the external filtering, providing additional fine
voltage steps.
The incremental pulses (with duration of T
CPU
) are
added to the beginning of the original PWM pulse.
The PWM intervals which are added to are
specified in the 4-bit BRM register and are
encoded as shown in the following table. The BRM
values shown may be combined together to
provide a summation of the incremental pulse
intervals specified.
The pulse increment corresponds to the PWM
resolution.
For example,if
– Data 18h is written to the PWM register
– Data 06h (00000110b) is written to the BRM reg-
ister
– with a 8MHz internal clock (125ns resolution)
Then 3.0
μ
s-long pulse will be output at 8
μ
s
intervals,
except
for
2,4,6,10,12,14, where the pulse is broadened to
3.125
μ
s.
cycles
numbered
Note:
If 00h is written to both PWM and BRM registers,
the generator output will remain at “0”. Conversely,
if both registers hold data 3Fh and 0Fh, respective-
ly, the output will remain at “1” for all intervals #1 to
#15, but it will return to zero at interval #0 for an
amount of time corresponding to the PWM resolu-
tion (T
CPU
).
An output can be set to a continuous “1” level by
clearing the PWM and BRM values and setting
POL = “1” (inverted polarity) in the PWM register.
This allows a PWM/BRM channel to be used as an
additional I/O pin if the DAC function is not
required.
Table 28. Bit BRM Added Pulse Intervals
(Interval #0 not selected).
Figure 72. BRM pulse addition (PWM > 0)
BRM 4 - Bit Data
0000
0001
0010
0100
1000
Incremental Pulse Intervals
none
i = 8
i = 4,12
i = 2,6,10,14
i = 1,3,5,7,9,11,13,15
T
CPU
x 64
T
CPU
x 64
T
CPU
x 64
T
CPU
x 64 increment
m= 1
m= 0
m= 2
T
CPU
x 64
m= 15
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