參數(shù)資料
型號: ST72774S9T1
廠商: 意法半導(dǎo)體
元件分類: ADC
英文描述: 8-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM, ADC, TIMER, SYNC, TMU, PWM/BRM, H/W DDC & I2C
中文描述: 8位USB單片機的顯示器,高達(dá)60K章檢察官辦公室,每1000內(nèi)存,模數(shù)轉(zhuǎn)換器,定時器,同步,材質(zhì)單元,脈寬調(diào)制/的BRM,的H / W DDC的
文件頁數(shù): 127/144頁
文件大?。?/td> 1280K
代理商: ST72774S9T1
ST72774/ST727754/ST72734
127/144
ST7 ADDRESSING MODES
(Cont’d)
5.1.1 Inherent
All Inherent instructions consist of a single byte.
The opcode fully specifies all the required
information for the CPU to process the operation.
5.1.2 Immediate
Immediate instructions have two bytes, the first
byte contains the opcode, the second byte
contains the operand value.
5.1.3 Direct
In Direct instructions, the operands are referenced
by their memory address.
The direct addressing mode consists of two sub-
modes:
Direct (short)
The address is a byte, thus requires only one byte
after the opcode, but only allows 00 - FF
addressing space.
Direct (long)
The address is a word, thus allowing 64 Kbyte
addressing space, but requires 2 bytes after the
opcode.
5.1.4 Indexed (No Offset, Short, Long)
In this mode, the operand is referenced by its
memory address, which is defined by the unsigned
addition of an index register (X or Y) with an offset.
The indirect addressing mode consists of three
sub-modes:
Indexed (No Offset)
There is no offset, (no extra byte after the opcode),
and allows 00 - FF addressing space.
Indexed (Short)
The offset is a byte, thus requires only one byte
after the opcode and allows 00 - 1FE addressing
space.
Indexed (long)
The offset is a word, thus allowing 64 Kbyte
addressing space and requires 2 bytes after the
opcode.
5.1.5 Indirect (Short, Long)
The required data byte to do the operation is found
by its memory address, located in memory
(pointer).
The pointer address follows the opcode. The
indirect addressing mode consists of two sub-
modes:
Indirect (short)
The pointer address is a byte, the pointer size is a
byte, thus allowing 00 - FF addressing space, and
requires 1 byte after the opcode.
Indirect (long)
Inherent Instruction
NOP
TRAP
Function
No operation
S/W Interrupt
Wait For Interrupt (Low Power
Mode)
Disabled, forces a RESET
Sub-routine Return
Interrupt Sub-routine Return
Set Interrupt Mask
Reset Interrupt Mask
Set Carry Flag
Reset Carry Flag
Reset Stack Pointer
Load
Clear
Push/Pop to/from the stack
Increment/Decrement
Test Negative or Zero
1 or 2 Complement
Byte Multiplication
WFI
HALT
RET
IRET
SIM
RIM
SCF
RCF
RSP
LD
CLR
PUSH/POP
INC/DEC
TNZ
CPL, NEG
MUL
SLL, SRL, SRA, RLC,
RRC
SWAP
Shift and Rotate Operations
Swap Nibbles
Immediate Instruction
LD
CP
BCP
AND, OR, XOR
ADC, ADD, SUB, SBC
Function
Load
Compare
Bit Compare
Logical Operations
Arithmetic Operations
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