參數(shù)資料
型號: PCI1620GHK
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù): 90/164頁
文件大?。?/td> 720K
代理商: PCI1620GHK
4
22
4.34 General-Purpose Event Status Register
The general-purpose event status register contains status bits that are set when general events occur, and can be
programmed to generate general-purpose event signaling through GPE. See Table 4
9 for a complete description
of the register contents.
Bit
7
6
5
4
3
2
1
0
Name
General-purpose event status
Type
RCU
RCU
R
RCU
RCU
RCU
RCU
RCU
Default
0
0
0
0
0
0
0
0
Register:
Offset:
Type:
Default:
General-purpose event status
88h
Read/Clear/Update, Read-only
00h
Table 4
9. General-Purpose Event Status Register Description
BIT
SIGNAL
TYPE
FUNCTION
7
PWR_STS
RCU
Power change status. This bit is set when software changes the VCC or VPP power state of either socket.
12-V VPP request status. This bit is set when software has changed the requested VPP level to or from 12 V
for either socket.
6
VPP12_STS
RCU
5
RSVD
R
Reserved. This bit returns 0 when read. A write has no effect.
4
GP4_STS
RCU
GPI4 status. This bit is set on a change in status of the MFUNC5 terminal input level if configured as a
general-purpose input, GPI4.
3
GP3_STS
RCU
GPI3 status. This bit is set on a change in status of the MFUNC4 terminal input level if configured as a
general-purpose input, GPI3.
2
GP2_STS
RCU
GPI2 status. This bit is set on a change in status of the MFUNC2 terminal input level if configured as a
general-purpose input, GPI2.
1
GP1_STS
RCU
GPI1 status. This bit is set on a change in status of the MFUNC1 terminal input level if configured as a
general-purpose input, GPI1.
0
GP0_STS
RCU
GPI0 status. This bit is set on a change in status of the MFUNC0 terminal input level if configured as a
general-purpose input, GPI0.
相關(guān)PDF資料
PDF描述
PCI1620PDV Controller Miscellaneous - Datasheet Reference
PCI2050A 32-Bit. 66MHz. 9-Master PCI-to-PCI Bridge
PCI2050GHK BUS CONTROLLER
PCI2050PDV BUS CONTROLLER
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