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參數(shù)資料
| 型號(hào)： | PCI1620GHK |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項(xiàng)-數(shù)據(jù)表參考 |
| 文件頁(yè)數(shù)： | 37/164頁(yè) |
| 文件大?。?/td> | 720K |
| 代理商： | PCI1620GHK |
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2
–
21
Table 2
–
15. 16-Bit PC Card Interface Control Terminals (Slots A and B)
TERMINAL
NUMBER
I/O
DESCRIPTION
NAME
SLOT A
PDV
SLOT B
PDV
GHK
GHK
BVD1
(STSCHG/RI)
141
H14
73
U09
I
Battery voltage detect 1. BVD1 is generated by 16-bit memory PC Cards that
include batteries. BVD1 is used with BVD2 as an indication of the condition of the
batteries on a memory PC Card. Both BVD1 and BVD2 are high when the battery
is good. When BVD2 is low and BVD1 is high, the battery is weak and should be
replaced. When BVD1 is low, the battery is no longer serviceable and the data in
the memory PC Card is lost. See Section 5.6,
ExCA Card Status-Change Interrupt
Configuration Register
, for enable bits. See Section 5.5,
ExCA Card
Status-Change Register
, and Section 5.2,
ExCA Interface Status Register
, for the
status bits for this signal.
Status change. STSCHG is used to alert the system to a change in the READY,
write-protect, or battery voltage detect condition of a 16-bit I/O PC Card.
Ring indicate. RI is used by 16-bit modem cards to indicate a ring detection.
BVD2
(SPKR)
140
H17
72
V09
I
Battery voltage detect 2. BVD2 is generated by 16-bit memory PC Cards that
include batteries. BVD2 is used with BVD1 as an indication of the condition of the
batteries on a memory PC Card. Both BVD1 and BVD2 are high when the battery
is good. When BVD2 is low and BVD1 is high, the battery is weak and should be
replaced. When BVD1 is low, the battery is no longer serviceable and the data in
the memory PC Card is lost. See Section 5.6,
ExCA Card Status-Change Interrupt
Configuration Register
, for enable bits. See Section 5.5,
ExCA Card
Status-Change Register
, and Section 5.2,
ExCA Interface Status Register
, for the
status bits for this signal.
Speaker. SPKR is an optional binary audio signal available only when the card and
socket have been configured for the 16-bit I/O interface. The audio signals from
cards A and B are combined by the PCI1620 and are output on SPKROUT.
CE1
CE2
96
98
V14
U14
27
30
K05
L02
O
Card enable 1 and card enable 2. CE1 and CE2 enable even- and odd-numbered
address bytes. CE1 enables even-numbered address bytes, and CE2 enables
odd-numbered address bytes.
INPACK
130
K17
61
R07
I
Input acknowledge. INPACK is asserted by the PC Card when it can respond to an
I/O read cycle at the current address.
IORD
101
V15
33
L05
O
I/O read. IORD is asserted by the PCI1620 to enable 16-bit I/O PC Card data output
during host I/O read cycles.
IOWR
102
R14
34
M01
O
I/O write.
IOWR is driven low by the PCI1620 to strobe write data into 16-bit I/O PC
Cards during host I/O write cycles.
OE
99
W15
31
L03
O
Output enable. OE is driven low by the PCI1620 to enable 16-bit memory PC Card
data output during host memory read cycles.
READY
(IREQ)
138
H19
69
V08
I
Ready. The ready function is provided by READY when the 16-bit PC Card and the
host socket are configured for the memory-only interface. READY is driven low by
the 16-bit memory PC Cards to indicate that the memory card circuits are busy
processing a previous write command. READY is driven high when the 16-bit
memory PC Card is ready to accept a new data transfer command.
Interrupt request. IREQ is asserted by a 16-bit I/O PC Card to indicate to the host
that a device on the 16-bit I/O PC Card requires service by the host software. IREQ
is high (deasserted) when no interrupt is requested.
REG
132
K14
64
U07
O
Attribute memory select. REG remains high for all common memory accesses.
When REG is asserted, access is limited to attribute memory (OE or WE active) and
to the I/O space (IORD or IOWR active). Attribute memory is a separately accessed
section of card memory and is generally used to record card capacity and other
configuration and attribute information.
Terminal name for slot A is preceded with A_. For example, the full name for terminals 141 and H14 are A_BVD1(STSCHG/RI).
Terminal name for slot B is preceded with B_. For example, the full name for terminals 73 and U09 are B_BVD1(STSCHG/RI).
相關(guān)PDF資料 |
PDF描述 |
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| PCI1620PDV | Controller Miscellaneous - Datasheet Reference |
| PCI2050A | 32-Bit. 66MHz. 9-Master PCI-to-PCI Bridge |
| PCI2050GHK | BUS CONTROLLER |
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