參數(shù)資料
型號： PCI1620GHK
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁數(shù)： 142/164頁
文件大?。?/td> 720K
代理商： PCI1620GHK
7
–
2
7.3
Command Register
This register provides control over the PCI1620 interface to the PCI bus. All bit functions adhere to the definitions
in the
PCI Local Bus Specification
. See Table 7
–
2 for a complete description of the register contents.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Command
Type
R
R
R
R
R
R
R
RW
R
RW
R
RW
R
RW
RW
RW
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register:
Offset:
Type:
Default:
Command
04h
Read-only, Read/Write
0000h
Table 7
–
2. Command Register Description
BIT
SIGNAL
TYPE
FUNCTION
15
–
10
RSVD
R
Reserved. Returns zeros when read.
9
FBB_EN
R
Fast back-to-back enable. The PCI1620 does not generate fast back-to-back transactions; thus, this bit
returns 0 when read.
8
SERR_EN
RW
SERR enable. When set, the PCI1620 SERR driver is enabled. SERR can be asserted after detecting
an address parity error on the PCI bus.
7
STEP_EN
R
Address/data stepping control. The PCI1620 does not support address/data stepping, so this bit is hard-
wired to 0.
6
PERR_EN
RW
Parity error enable. When set, the PCI1620 is enabled to drive PERR response to parity errors through
the PERR signal.
5
VGA_EN
R
VGA palette snoop enable. The PCI1620 does not feature VGA palette snooping; thus, this bit returns 0
when read.
4
MWI_EN
RW
Memory write-and-invalidate (MWI) enable. When set, the PCI1620 is enabled to generate MWI PCI bus
commands. If reset, the PCI1620 generates memory write commands instead.
3
SPECIAL
R
Special cycle enable. The PCI1620 does not respond to special cycle transactions. This bit returns 0
when read.
2
MAST_EN
RW
Bus master enable. When set, the PCI1620 is enabled to initiate cycles on the PCI bus.
1
MEM_EN
RW
Memory response enable. Setting this bit enables the PCI1620 to respond to memory cycles on the PCI
bus.
0
IO_EN
RW
I/O space enable. Setting this bit enables the PCI1620 to respond to I/O space accesses.
相關(guān)PDF資料
PDF描述
PCI1620PDV Controller Miscellaneous - Datasheet Reference
PCI2050A 32-Bit. 66MHz. 9-Master PCI-to-PCI Bridge
PCI2050GHK BUS CONTROLLER
PCI2050PDV BUS CONTROLLER
PCI9054AB50BI Interface IC
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