參數(shù)資料
型號: PCI1620GHK
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù): 145/164頁
文件大?。?/td> 720K
代理商: PCI1620GHK
7
5
7.8
Header Type Register
This read-only register indicates that this function has a standard PCI header type.
Bit
7
6
5
4
3
2
1
0
Name
Header type
Type
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
Register:
Offset:
Type:
Default:
Header type
0Eh
Read-only
00h
7.9
BIST Register
Because PCI1620 does not support a built-in self test (BIST), this read-only register returns the value of 00h when
read.
Bit
7
6
5
4
3
2
1
0
Name
BIST
Type
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
Register:
Offset:
Type:
Default:
BIST
0Fh
Read-only
00h
7.10 Base Address Register
This register specifies the base address of a 4-byte I/O space used for loading the PCI1620 firmware. See Table 7
5
for a complete description of the register contents.
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
Base address
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Base address
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Register:
Offset:
Type:
Default:
Base address
10h
Read-only, Read/Write
0000 0001h
Table 7
5. Base Address Register Description
BIT
SIGNAL
TYPE
FUNCTION
31
2
BAR
RW
Base address. This field specifies the upper 30 bits of the 32-bit starting base address.
1
RSVD
R
Reserved. This bit returns 0 when read.
0
IO_INDICATOR
R
I/O space indicator. This bit is hardwired to 1 to indicate that the base address maps into I/O space.
相關(guān)PDF資料
PDF描述
PCI1620PDV Controller Miscellaneous - Datasheet Reference
PCI2050A 32-Bit. 66MHz. 9-Master PCI-to-PCI Bridge
PCI2050GHK BUS CONTROLLER
PCI2050PDV BUS CONTROLLER
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