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參數(shù)資料
| 型號： | M34559G6FP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP52 |
| 封裝： | 10 X 10 MM, 0.65 MM PITCH, PLASTIC, LQFP-52 |
| 文件頁數(shù)： | 91/93頁 |
| 文件大?。?/td> | 1810K |
| 代理商： | M34559G6FP |
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CLRC663
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Preliminary data sheet
COMPANY PUBLIC
Rev. 3.1 — 26 September 2011
171131
97 of 126
NXP Semiconductors
CLRC663
Contactless reader IC
15. Interrupt request system
The CLRC663 indicates certain events by setting bit Irq in the register Status1Reg and
additionally, if activated, by pin IRQ. The signal on pin IRQ may be used to interrupt the
host using its interrupt handling capabilities. This allows the implementation of efficient
host software.
The following table shows the available interrupt bits, the corresponding source and the
condition for its activation. The interrupt bit TimernIrq in register Irq1_Reg indicates an
interrupt set by the timer unit. The setting is done when the timer decrements from 1 down
to 0.
The TxIrq bit in register IRq0_Reg indicates that the transmission is finished. If the state
changes from sending data to transmitting the end of the frame pattern, the transmitter
unit sets the interrupt bit automatically.
The bit RxIrq in register Irq0_Reg indicates an interrupt when the end of the received data
is detected.
The bit IdleIrq in register IRq0_Reg is set if a command finishes and the content of the
command register changes to idle.
The bit HiAlertIrq in register Irq0_Reg is set to logic 1 if the HiAlert bit is set to logic 1, that
means the FiFo buffer has reached the level indicated by the bit WaterLevel.
The bit LoAlertIrq in register Irq0_Reg is set to logic 1 if the LoAlert bit is set to logic 1, that
means the FiFo buffer has reached the level indicated by the bit WaterLevel.
The bit ErrIrq in register Irq0_Reg indicates an error detected by the contactless UART
during sending or receiving. This is indicated by any bit set to logic 1 in register ErrorReg.
The bit LPCDIrq in register Irq0_Reg indicates a card detected.
The bit RxSOFIrq in register Irq0_Reg indicates a detection of a SOF or a subcarrier by
the contactless UART during receiving.
The bit GlobalIRq in register Irq1_Reg indicates an interrupt occurring at any other
interrupt source when enabled.
Table 231: Interrupt sources
Interrupt bit
Interrupt source
Is set automatically, when
TimerIrq
Timer Unit
the timer counts from 1 to 0
TxIrq
Transmitter
a transmitted data stream ends
RxIrq
Receiver
a received data stream ends
IdleIrq
Command Register
a command execution finishes
HiAlertIrq
FiFo-buffer
the FiFo-buffer is getting full
LoAlertIrq
FiFo-buffer
the FiFo-buffer is getting empty
ErrIrq
contactless UART
an error is detected
LPCDIrq
LPCD
A card was detected when in low power card detection
mode
RxSOFIrq
Receiver
Detection of a SOF or a subcarrier
GlobalIrq
all interrupt sources
will be set if an other Irq source is set
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相關代理商/技術參數(shù) |
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|---|---|
| M34559G6-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M3455AG8FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M3455AG8-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M3455AGCFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M3455AGC-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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