參數(shù)資料
型號(hào): M34559G6FP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP52
封裝: 10 X 10 MM, 0.65 MM PITCH, PLASTIC, LQFP-52
文件頁(yè)數(shù): 66/93頁(yè)
文件大?。?/td> 1810K
代理商: M34559G6FP
CLRC663
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Preliminary data sheet
COMPANY PUBLIC
Rev. 3.1 — 26 September 2011
171131
74 of 126
NXP Semiconductors
CLRC663
Contactless reader IC
10.4.6 7-BIT ADDRESSING
During the I2C-bus addressing procedure, the first byte after the START condition is used
to determine which slave will be selected by the master.
As an exception several address numbers are reserved. During device configuration, the
designer has to ensure, that no collision with these reserved addresses is possible. Check
the corresponding I2C specification for a complete list of reserved addresses.
For all CLRC663 devices the upper 5 bits of the device bus address are reserved by NXP
and set to 01010(bin). The remaining 2 bits (ADR_2, ADR_1) of the slave address can
freely configured by the customer in order to prevent collisions with other I2C devices by
using the interface pins (refer to Table 207) or the value of the I2C address EEPROM
register. (Refer to Table 227).
Fig 19. Acknowledge on the I2C- bus
Fig 20. Data transfer on the I2C- bus
001aam302
clock pulse for
acknowledgement
1
SCL FROM
MASTER
DATA OUTPUT
BY RECEIVERER
DATA OUTPUT
BY TRANSMITTER
28
9
acknowledge
START
condition
S
not acknowledge
001aam303
MSB
acknowledgement
signal from slave
acknowledgement
signal from receiver
clock line held low while
interrupts are serviced
byte complete,
interrupt within slave
1
27
8
9
1
2
9
ACK
3 - 8
Sr
or
P
Sr
S
or
Sr
Fig 21. First byte following the START procedure
001aam304
Bit 6
Bit 5
Bit 4
slave address
Bit 3
Bit 2
Bit 1
Bit 0
R/W
MSB
LSB
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