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JTAG
21
21-5
32185/32186 Group Hardware Manual
Rev.1.10 REJ09B0235-0110 May 15, 07
21.3 JTAG Registers
21.3.2 Data Register
(1) Boundary Scan Register (JTAGBSR)
The Boundary Scan Register is a 294-bit register used to perform boundary-scan test. The bits in this
register are assigned to each pin on the microcomputer.
Connected between the JTDI and JTDO pins, this register is selected when issuing EXTEST or
SAMPLE/PRELOAD instruction. In the Capture-DR state, this register captures the status of input
pins or internal logic outputs. In the Shift-DR state, while outputting the sampled value, this register
receives the input data for boundary-scan test to set pin functions (direction of input/output and
tristate output pins) and output values.
(2) Bypass Register (JTAGBPR)
The Bypass Register is a 1-bit register used to bypass the boundary-scan path when the microcom-
puter is not the target of boundary-scan test. Connected between the JTDI and JTDO pins, this regis-
ter is selected when issuing BYPASS instruction. This register is loaded with b’0 (fixed value) in the
Capture-DR state.
(3) ID Code Register (JTAGIDR)
The ID Code Register is a 32-bit register used to identify the device and manufacturer. It holds the
following information:
Version information (4 bits)
: b’0000
Part number (16 bits)
: b'0011 0010 0010 0111 (32185)
: b’0011 0010 0010 0110 (32186)
Manufacturer ID (11 bits)
: b’010 0010 0011
This register is connected between the JTDI and JTDO pins, and is selected when issuing IDCODE
instruction. This register is loaded with said IDCODE data in the Capture-DR state, and outputs it from
the JTDO pin in the Shift-DR state.
The ID Code Register is a read-only register. Because the data written from the JTDI pin during DR
path sequence is ignored, make sure JTDI input = "L" while in the Shift-DR state.
Note: For details about the Capture-DR and Shift-DR states, see Section 21.4, “Basic Operation of JTAG.”
3
0
4
19 20
31
30
1
Manufacturer ID
Part number
Version
4 bits
16 bits
11 bits