
20
OSCILLATOR CIRCUIT
20-3
32185/32186 Group Hardware Manual
Rev.1.10 REJ09B0235-0110 May 15, 07
20.1 Oscillator Circuit
20.1.2 XIN Oscillation Stoppage Detection Circuit
The M32R/ECU contains a detection circuit to find whether oscillation input to the PLL circuit has stopped.
The PLL circuit oscillates with the frequency of its normal mode of vibration in the absence of the reference
oscillation input.
The XIN oscillation input is sampled at the peripheral clock and when the XIN oscillation is found to be at
the same level on the basis of threshold value for XIN Oscillation Stoppage Detection, the XSTAT bit is
set. Because the CPU continues operating with the PLL circuit’s natural frequency even when the XIN
oscillation has stopped, error handling for the stoppage of XIN oscillation can be accomplished by
inspecting XSTAT bit in software.
For details about the value of XIN Oscillation Stoppage Detection,see "Chapter 23 ELECTRICAL CHAR-
ACTERISTICS."
Figure 20.1.2 Block Diagram of the XIN Oscillation Stoppage Detection Circuit
Port Input Special Function Control Register (PICNT)
<Address: H’0080 0745>
9
1011121314
b15
b8
PIEN0
PISEL
XSTAT
00
0
<Upon exiting reset: H’00>
b
Bit Name
Function
R
W
8–10
No function assigned. Fix to "0."
0
11
XSTAT
0: XIN oscillating
R (Note 1)
XIN oscillation status bit
1: XIN inactive
12, 13
No function assigned. Fix to "0."
0
14
PISEL
0: Content of port output latch
R
W
Port input data select bit
1: Port pin level
15
PIEN0
0: Disable input
R
W
Port input enable bit
1: Enable input
Note 1: Only writing "0" is effective. Writing "1" has no effect; the bit retains the value it had before the write.
For details about the function explanation of the port input data select bit (PISEL) and port input enable bit
(PIEN0), see Section 8.3.4, “Port Input Special Function Control Register.”
Counter
XSTAT
flag
XIN oscillation stoppage detection circuit
XIN
CLOCK
RESET
XOUT
Oscillator
circuit
PLL circuit
Edge detection
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