
SUMMARY OF PRECAUTIONS
Appendix 4
Appendix 4-29
32185/32186 Group Hardware Manual
Rev.1.10 REJ09B0235-0110 May 15, 07
Appendix 4.13 Notes on DRI
Precautions about the DRI is shown below.
In order that the data writing from DRI and RTD to internal RAM use the exclusive bus prepared apart from M32 R-
FPU, do not usually generate the competition with access from other bus masters (CPU, DMA, NBD, SDI).
However DRI transfer, RTD transfer and the access (read-out/writing) from other bus master occur at the same
time for areas of the 16-K byte unit of internal RAM, access competition occurs.
When access competition occurs, mediation is operated according to the following priority.
NBD/SDI > DMA > CPU > DRI > RTD
Appendix 4.14 Notes on RAM Backup Mode
Appendix 4.14.1 Precautions to Be Observed at Power-On
When changing portn from input mode to output mode after power-on, pay attention to the following.
If port n is set for output mode while no data is set in the Portn Data Register, the port’s initial output level is
instable. Therefore, before changing portn for output mode, make sure the Portn Data Register is set to output a
"H."
Unless this precaution is followed, port output may go "L" at the same time the port is set for output after the
oscillation has stabilized, causing the microcomputer to enter RAM backup mode.
Appendix 4.14.2 Power-On Limitation
When powering on, make sure to meet the limitation VDDE
≥ VCCER. If VDDE is 3.0 V or more, there will be no
problem even when the limitation VDDE
≥ VCCER cannot be met.
When the above power-on limitation cannot be met, sufficient evaluation must be made during system design
in order to ensure that no power will be applied to the microcomputer with a potential difference of 1 V or more.
For potential differences 0 V to 0.6 V, there is almost no in-flow current. The amount of in-flow current begins to
increase when the potential difference exceeds 0.6 V.