參數(shù)資料
型號： ISP1583BS
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Hi-Speed Universal Serial Bus peripheral controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQCC64
封裝： 9 X 9 MM, 0.85 MM HEIGHT, LEAD FREE, PLASTIC, MO-220, SOT-804-1, HVQFN-64
文件頁數(shù)： 36/87頁
文件大小： 420K
代理商： ISP1583BS
Philips Semiconductors
ISP1583
Hi-Speed USB peripheral controller
Product data
Rev. 03 — 12 July 2004
36 of 87
9397 750 13461
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9.3 Data flow registers
9.3.1
Endpoint Index register (address: 2Ch)
The Endpoint Index register selects a target endpoint for register access by the
microcontroller. The register consists of 1 byte, and the bit allocation is shown in
Table 31
.
The following registers are indexed:
Buffer Length
Buffer Status
Control Function
Data Port
Endpoint MaxPacketSize
Endpoint Type.
For example, to access the OUT data buffer of endpoint 1 using the Data Port
register, the Endpoint Index register has to be written first with 02h.
Remark:
The Endpoint Index register and the DMA Endpoint Index register must not
point to the same endpoint.
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
IEP5RX
IEP4TX
IEP4RX
IEP3TX
IEP3RX
IEP2TX
IEP2RX
IEP1TX
IEP1RX
IEP0TX
IEP0RX
-
IEP0SETUP Logic 1 enables interrupt for the setup data received on endpoint 0.
IEVBUS
Logic 1 enables interrupt for V
BUS
sensing.
IEDMA
Logic 1 enables interrupt on DMA status change detection.
IEHS_STA
Logic 1 enables interrupt on detection of a high-speed status
change.
IERESM
Logic 1 enables interrupt on detection of a resume state.
IESUSP
Logic 1 enables interrupt on detection of a suspend state.
IEPSOF
Logic 1 enables interrupt on detection of a Pseudo SOF.
IESOF
Logic 1 enables interrupt on detection of an SOF.
IEBRST
Logic 1 enables interrupt on detection of a bus reset.
Logic 1 enables interrupt from the indicated endpoint.
Logic 1 enables interrupt from the indicated endpoint.
Logic 1 enables interrupt from the indicated endpoint.
Logic 1 enables interrupt from the indicated endpoint.
Logic 1 enables interrupt from the indicated endpoint.
Logic 1 enables interrupt from the indicated endpoint.
Logic 1 enables interrupt from the indicated endpoint.
Logic 1 enables interrupt from the indicated endpoint.
Logic 1 enables interrupt from the indicated endpoint.
Logic 1 enables interrupt from the control IN endpoint 0.
Logic 1 enables interrupt from the control OUT endpoint 0.
reserved
4
3
2
1
0
Table 30:
Bit
Interrupt Enable register: bit description
…continued
Symbol
Description
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相關代理商/技術參數(shù)
參數(shù)描述
ISP1583BS,518 功能描述:USB 接口集成電路 USB PERIPH CNTRLR RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1583BS,551 功能描述:USB 接口集成電路 HI-SPEED USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1583BS,557 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1583BS518 制造商:ST-Ericsson 功能描述:CONTROLLER USB PERIPHERAL 64HVQFN
ISP1583BSGA 功能描述:IC USB CTRL HI-SPEED 64HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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