參數(shù)資料
型號(hào): ISP1583BS
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 總線控制器
英文描述: Hi-Speed Universal Serial Bus peripheral controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC64
封裝: 9 X 9 MM, 0.85 MM HEIGHT, LEAD FREE, PLASTIC, MO-220, SOT-804-1, HVQFN-64
文件頁(yè)數(shù): 22/87頁(yè)
文件大小: 420K
代理商: ISP1583BS
Philips Semiconductors
ISP1583
Hi-Speed USB peripheral controller
Product data
Rev. 03 — 12 July 2004
22 of 87
9397 750 13461
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.15.1
Power-sharing mode
As can be seen in
Figure 12
, in power-sharing mode, V
CC(3V3)
is supplied by the
output of the 5 V-to-3.3 V voltage regulator. The input to the regulator is from V
BUS
.
V
CC(I/O)
is supplied through the power source of the system. When the USB cable is
plugged in, the ISP1583 goes through the power-on reset cycle. In this mode, OTG is
disabled.
The processor will experience continuous interrupt because the default status of the
interrupt pin when operating in sharing mode with the V
BUS
not present is LOW. To
overcome this, implement external V
BUS
sensing circuitry. The output from the voltage
regulator can be connected to pin GPIO of the processor to qualify the interrupt from
the ISP1583.
Fig 12. Power-sharing mode.
Fig 13. Interrupt pin status during power off in power-sharing mode.
004aaa458
ISP1583
+
5 V-to-3.3 V
VOLTAGE
REGULATOR
USB
To GPIO of processor
for sensing VBUS
1 M
VCC(3V3)
VCC(I/O)
VBUS
RPU
VBUS
1 μF
1.5 k
+
004aaa459
VCC(I/O)
VCC(3V3)
INT
power off
power off
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