參數(shù)資料
型號: ISP1362EE,551
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝: 6 X 6 MM, 0.80 HEIGHT, PLASTIC, MO-195, SOT-543-1, TFBGA-64
文件頁數(shù): 34/152頁
文件大?。?/td> 677K
代理商: ISP1362EE,551
ISP1362_5
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 05 — 8 May 2007
129 of 152
NXP Semiconductors
ISP1362
Single-chip USB OTG Controller
19. Dynamic characteristics
[1]
Dependent on the crystal oscillator startup time.
[2]
Tolerance of the clock frequency is
±50 ppm.
[1]
DP represents OTG_DP1 and H_DP2, and DM represents OTG_DM1 and H_DM2. Test circuit.
[2]
Excluding the rst transition from the idle state.
[3]
Characterized only, not tested. Limits guaranteed by design.
Table 149. Dynamic characteristics
VCC = 3.0 V to 3.6 V; GND = 0 V; Tamb = 40 °C to +85 °C; unless otherwise specied.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Reset
tW(RESET) pulse width on input RESET
crystal oscillator running
10
-
ms
crystal oscillator stopped
[1] ---ms
Crystal oscillator
fxtal
crystal frequency
12
-
MHz
RS
series resistance
-
100
CLOAD
load capacitance
CX1, CX2 = 22 pF
-
12
-
pF
External clock input
J
external clock jitter
-
500
ps
tDUTY
clock duty cycle
45
50
55
%
tCR
rise time
-
3
ns
tCF
fall time
-
3
ns
Table 150. Dynamic characteristics: analog I/O lines (D+, D
)
VCC = 3.0 V to 3.6 V; GND = 0 V; Tamb = 40 °C to +85 °C; CL = 50 pF; RPU = 1.5 k± 5 % on DP to VTERM; unless otherwise
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Driver characteristics
tFR
rise time
CL = 50 pF; 10 % to
90 % of
|V
OH VOL|
4
-
20
ns
tFF
fall time
CL = 50 pF; 90 % to
10 % of
|V
OH VOL|
4
-
20
ns
FRFM
differential rise time/fall time
matching
(tFR/tFF)
-
111.11
%
VCRS
output signal crossover voltage
-
2.0
V
Table 151. Dynamic characteristics: charge pump
VCC = 3.0 V to 3.6 V; GND = 0 V; Tamb = 40 °C to +85 °C; CLOAD =2 F; unless otherwise specied.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Driver characteristics
tSTART-UP
rise time to VBUS = 4.4 V
ILOAD = 8 mA; CLOAD =
10
F
-
100
ms
tCOMP_CLK
clock period
1.5
-
3
s
tVBUS(VALID_dly) minimum time VBUS(VALID)
error
100
-
200
s
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