參數(shù)資料
型號： ISP1362EE,551
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝： 6 X 6 MM, 0.80 HEIGHT, PLASTIC, MO-195, SOT-543-1, TFBGA-64
文件頁數(shù)： 138/152頁
文件大?。?/td> 677K
代理商： ISP1362EE,551
ISP1362_5
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 05 — 8 May 2007
86 of 152
NXP Semiconductors
ISP1362
Single-chip USB OTG Controller
16
CSC
ConnectStatusChange: This bit is set whenever a connect or
disconnect event occurs. The HCD writes logic 1 to clear this bit.
Writing logic 0 has no effect. If CurrentConnectStatus (CCS) is cleared
when a SetPortReset, SetPortEnable or SetPortSuspend write occurs,
this bit is set to force the driver to re-evaluate the connection status
because these writes should not occur if the port is disconnected.
0 — no change in CurrentConnectStatus (CCS)
1 — change in CurrentConnectStatus (CCS)
Remark: If the DeviceRemovable[NDP] bit is set, this bit is set only
after a root hub reset to inform the system that the device is attached.
15 to 10
-
reserved
9
LSDA
On read LowSpeedDeviceAttached: This bit indicates the speed of
the device attached to this port. When set, a low-speed device is
attached to this port. When cleared, a full-speed device is attached to
this port. This eld is valid only when CurrentConnectStatus (CCS) is
set.
0 — full-speed device attached
1 — low-speed device attached
On write ClearPortPower: The HCD clears the PortPowerStatus
(PPS) bit by writing logic 1 to this bit. Writing logic 0 has no effect.
8
PPS
On read PortPowerStatus: This bit reects the port power status,
regardless of the type of power switching implemented. This bit is
cleared if an overcurrent condition is detected. The HCD sets this bit
by writing SetPortPower or SetGlobalPower. The HCD clears this bit
by writing ClearPortPower or ClearGlobalPower. PowerSwitchingMode
(PCM) and PortPowerControlMask[NDP] (PPCM[NDP]) determine
which power control switches are enabled. In global switching mode
(PowerSwitchingMode = 0), only the Set/ClearGlobalPower command
controls this bit. In the per-port power switching
(PowerSwitchingMode = 1), if the PortPowerControlMask[NDP]
(PPCM[NDP]) bit for the port is set, only Set/ClearPortPower
commands are enabled. If the mask is not set, only
Set/ClearGlobalPower commands are enabled. When port power is
disabled, CurrentConnectStatus (CCS), PortEnableStatus (PES),
PortSuspendStatus (PSS) and PortResetStatus (PRS) should be
reset.
0 — port power is off
1 — port power is on
On write SetPortPower: The HCD writes logic 1 to set the
PortPowerStatus (PPS) bit. Writing logic 0 has no effect.
Remark: This bit always reads logic 1 if power switching is not
supported.
7 to 5
-
reserved
Table 62.
HcRhPortStatus[1:2] register: bit description …continued
Bit
Symbol
Description
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