參數(shù)資料
型號： ISP1362EE,551
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝： 6 X 6 MM, 0.80 HEIGHT, PLASTIC, MO-195, SOT-543-1, TFBGA-64
文件頁數(shù)： 139/152頁
文件大?。?/td> 677K
代理商： ISP1362EE,551
ISP1362_5
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 05 — 8 May 2007
87 of 152
NXP Semiconductors
ISP1362
Single-chip USB OTG Controller
4
PRS
On read PortResetStatus: When this bit is set by a write to
SetPortReset, port reset signaling is asserted. When reset is
completed, this bit is cleared when PortResetStatusChange (PRSC) is
set. This bit cannot be set if CurrentConnectStatus (CCS) is cleared.
0 — port reset signal is not active
1 — port reset signal is active
On write SetPortReset: The HCD sets the port reset signaling by
writing logic 1 to this bit. Writing logic 0 has no effect. If
CurrentConnectStatus (CCS) is cleared, this write does not set
PortResetStatus (PRS) but instead sets ConnectStatusChange
(CSC). This informs the driver that it attempted to reset a
disconnected port.
3
POCI
On read PortOverCurrentIndicator: This bit is valid only when the
root hub is congured in such a way that overcurrent conditions are
reported on a per-port basis. If per-port overcurrent reporting is not
supported, this bit is set to logic 0. If cleared, all power operations are
normal for this port. If set, an overcurrent condition exists on this port.
This bit always reects the overcurrent input signal.
0 — no overcurrent condition
1 — overcurrent condition detected
On write ClearSuspendStatus: The HCD writes logic 1 to initiate a
resume. Writing logic 0 has no effect. A resume is initiated only if
PortSuspendStatus (PSS) is set.
2
PSS
On read PortSuspendStatus: This bit indicates whether the port is
suspended or is in the resume sequence. It is set by a
PortSuspendStatus write and cleared when
PortSuspendStatusChange (PSSC) is set at the end of the resume
interval. This bit cannot be set if CurrentConnectStatus (CCS) is
cleared. This bit is also cleared when PortResetStatusChange
(PRSC) is set at the end of the port reset or when the Host Controller
is placed in the USBResume state. If an upstream resume is in
progress, it should propagate to the Host Controller.
0 — port is not suspended
1 — port is suspended
On write SetPortSuspend: The HCD sets the PortSuspendStatus
(PSS) bit by writing logic 1 to this bit. Writing logic 0 has no effect. If
CurrentConnectStatus (CCS) is cleared, this write does not set
PortSuspendStatus (PSS); instead it sets ConnectStatusChange
(CSC). This informs the driver that it attempted to suspend a
disconnected port.
Table 62.
HcRhPortStatus[1:2] register: bit description …continued
Bit
Symbol
Description
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參數(shù)描述
ISP1362EE-S 功能描述:IC USB CTRL SNGL CHIP 64TFBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1362EE-T 功能描述:USB 接口集成電路 USB OTG HOST RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
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ISP1501 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Hi-Speed Universal Serial Bus peripheral transceiver
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