參數(shù)資料
型號(hào)： Intel Celeron Processor
廠商： Intel Corp.
英文描述： Intel Celeron Processor Mobile Module MMC-2 at 400 MHz, 366 MHz, 333 MHz, and 300 MHz(工作頻率400,366,333,300和266兆赫茲帶移動(dòng)模塊和連接器2處理器)
中文描述： 英特爾賽揚(yáng)處理器的移動(dòng)模塊絲裂霉素在400兆赫，366兆赫，333兆赫和300兆赫2（工作頻率400366333300和266兆赫茲帶移動(dòng)模塊和連接器2處理器）
文件頁(yè)數(shù)： 15/47頁(yè)
文件大小： 414K
代理商： INTEL CELERON PROCESSOR
Intel
a
Celeron
Processor Mobile Module MMC-2
at 400 MHz, 366 MHz, 333 MHz, and 300 MHz
15
3.1.8
Clock (9 Signals)
Table 8 lists the clock signals.
Table 8. Clock Signal Descriptions
Name
Type
Voltage
Description
PCLK
I
PCI
V_3
PCI Clock In:
PCLK is an input to the module and is one of the system’s PCI clocks.
This clock is used by all of the 82433BX Host Bridge logic in the PCI clock domain.
This
clock is stopped when the PIIX4E/M PCI_STP# signal is asserted and/or during all
suspend states.
HCLK[1:0]
I
CMOS
V_CLK
Host Clock In:
These clocks are inputs to the module from the CK97-M clock source.
The processor and the 82433BX Host Bridge system controller use HCLK[0]. This clock
is stopped when the PIIX4E/M CPU_STP# signal is asserted and/or during all suspend
states.
DCLKO
O
CMOS
V_3
SDRAM Clock Out:
A 66-MHz SDRAM clock reference generated internally by the
82433BX Host Bridge system controller onboard PLL. It feeds an external buffer that
produces multiple copies for the SO-DIMMs.
DCLKRD
I
CMOS
V_CLK
SDRAM Read Clock:
Feedback reference from the SDRAM clock buffer. The 82433BX
Host Bridge System Controller uses this clock when reading data from the SDRAM
array. This signal is not implemented on the module.
DCLKWR
I
CMOS
I
CMOS
O
CMOS
V_CLK
SDRAM Write Clock:
Feedback reference from the SDRAM clock buffer. The 82433BX
Host Bridge system controller uses this clock when writing data to the SDRAM array.
GCLKIN
V_3
AGP Clock In:
The GCLKIN input is a feedback reference from the GCLKO signal.
GCLKO
V_3
AGP Clock Out:
This signal is generated by the 82433BX Host Bridge system controller
onboard PLL from the HCLK0 host clock reference. The frequency of GCLKO is 66
MHz. The GCLKO output is used to feed both the PLL reference input pins on the
82433BX Host Bridge system controller and the AGP device. The board layout must
maintain complete symmetry on loading and trace geometry to minimize AGP clock
skew.
FQS
O
CMOS
V_CLK
Frequency Select:
This output signal provides the status of the host clock frequency to
the system electronics.
This signal is static and is pulled either low or high to the V_CLK
voltage supply through a 10-K
resistor. This module is designed for the 66-MHz
strapping option shown below.
FQS=0 indicates 66 MHz
FQS=1 indicates 100 MHz (for future Intel mobile modules)
相關(guān)PDF資料
PDF描述
intel i387 Military I387 Math Coprocessor(軍用I387數(shù)學(xué)協(xié)處理器)
intel M80C186 CHMOS High Integration 16-Bit Microprocessor(CHMOS 高集成16位微處理器)
intel Pentium CPU 32 Bit CPU With MMX Technology and Mobile Module(32位帶MMX和移動(dòng)模塊處理器)
intel Pentium II processor Pentium II Processor Mobile Module(帶移動(dòng)模塊奔II處理器)
INTEL386 CXSA 5-V 32-Bit Fully Static Embedded Microprocessor(5V，32位完全靜態(tài)嵌入式微處理器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
INTELLIGENT CHARGER + 4AA 制造商:Energizer 功能描述:Bulk
INTELLI-INCH-LR-STARTER K 制造商:ALL MOTION 功能描述:Intelli-Inch Stepper & Controller Starter Kit
INTELLIPANEL 制造商:GJD 功能描述:EXTENSION LEAD 8GANG INTELLIPANEL 制造商:GJD 功能描述:EXTENSION LEAD, 8GANG, INTELLIPANEL
INTELLIPLUG 制造商:GLOBAL COMMUNICATIONS 功能描述:ADAPTOR 3WAY INTELLIPLUG
INTELLIPROBE 100 制造商:Fluke Networks 功能描述:TONE + PROBE KIT
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*
    • 我
    • 采购
    • 搜索
    • 会员