參數(shù)資料
型號(hào)： IBM3209K3114
廠商： IBM Microeletronics
英文描述： IBM Packet Routing Switch Serial Interface Converter(IBM封裝路線選擇開關(guān)串行接口轉(zhuǎn)換器)
中文描述： IBM的分組路由交換機(jī)串行接口轉(zhuǎn)換器（IBM的封裝路線選擇開關(guān)串行接口轉(zhuǎn)換器）
文件頁數(shù)： 75/152頁
文件大小： 2390K
代理商： IBM3209K3114
IBM3209K3114
Advance
IBM Packet Routing Switch Serial Interface Converter
prssi.01
July 12, 2000
Converter Configuration Table Registers
Page 65 of 142
4.1.1.15 DASL M3 Picocode X Register
Read and Write Operations
The write operation is performed as follows:
1. Set data byte in @ 40
2. Set data byte in @ 41
3. Set address in @ 42
4. Set the remaining bits of the address and bit 30 in @ 43 to issue the write operation
5. Reset bit 30 in @ 43
Repeat the above operational sequence as long as there is data to be loaded in the DASL. Bit 30 does not
need to be reset between two successive write operations. For example, in the sdc.h file provided by IBM, the
syntax in cmd file: WRITE (ADDRESS >= x
’
40
’
, DATA >= x
’
4000900F
’
); where
‘
4000
’
means write enable
and 000 is the start address) is Start Address and
‘
900F
’
is Data.
The read operation is performed as follows:
1. Set address byte in @42
2. Set the remaining address byte and bit 31 in @43
3. Poll @43 bit 29 for read completion. Then the data is valid and can be read from @40 and 41
4. Reset read enable bit 31 in @43 and read complete bit by writing '0' in bits 29 and 31
X
X
X
Unused Xaddress
Xaddress
XData
XData
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Reset Output Status
(Power-on-Reset, DASL path X reset, SDC path X reset) All
’
0
’
s
Address in Word Mode
Address in Byte Mode
Access Type
x'40
’
x'40 to 43
’
Read/Write
Bits/Word
Bits/Bytes
Name
Description
31
7
XRead
Read Enable. Does not reset by itself
30
6
XWrite
Write enable
29
5
Xcomplete
Read instruction complete flag (acknowledge). must be reset after completion
28-27
4-3
Unused
26-24
2-0
Xaddress
The following table gives the mapping between the eleven bits in this register,
the addresses in the code and the bits within the DASL hardware Bit ordering
for each entity.
MSB
LSB
DASL
0
10
Code
10
0
Register26
16
23-16
7-0
Xaddress
15-8
7-0
XData
M3 read/write Data
7-0
7-0
XData
M3 read/write Data
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