參數(shù)資料
型號: HYB18T256324F-20
廠商: INFINEON TECHNOLOGIES AG
英文描述: 256-Mbit GDDR3 DRAM [600MHz]
中文描述: 256兆GDDR3顯示內(nèi)存[600MHz的]
文件頁數(shù): 54/80頁
文件大?。?/td> 2026K
代理商: HYB18T256324F-20
HYB18T256324F–[16/20/22]
256-Mbit DDR SGRAM
Functional Description
Data Sheet
54
Rev. 1.11, 04-2005
10292004-DOXT-FS0U
3.8.6
Read followed by Precharge on the same Bank
Figure 37
Read followed by Precharge on the same Bank
1.
t
RAS
requirement must also be met before issuing PRE command
2. RD and PRE commands are applied to the same bank.
3. Shown with nominal
t
AC
and
t
DQSQ
4. RDQS will start driving high 1/2 cycle prior to the first falling edge and stop 1/2 cycle after the last rising edge
of RDQS
#,+
#,+
2$
. $
. $
#OM
. $
02%
. $
. $
. $
. $
" #
!DDR
$ONgT #ARE
#!3 LATENCY
2$13
$1
#!3 LATENCY
2$13
$1
$
$
$
$
$
$
$
$
T
20
" #
2$
02%
"ANK #OLUMN ADDRESS
2%!$
02% #(!2' %
$X
. $
$ATA FROM " #
./0 OR $ESELECT
#OM
!DDR
#OMMAND
!DDRESS " #
$1S 4ERMINATIONS OFF
2$13 .OT DRIVEN
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