參數(shù)資料
型號(hào)： HYB18T256324F-20
廠商： INFINEON TECHNOLOGIES AG
英文描述： 256-Mbit GDDR3 DRAM [600MHz]
中文描述： 256兆GDDR3顯示內(nèi)存[600MHz的]
文件頁(yè)數(shù)： 29/80頁(yè)
文件大?。?/td> 2026K
代理商： HYB18T256324F-20
HYB18T256324F–[16/20/22]
256-Mbit DDR SGRAM
Functional Description
Data Sheet
29
Rev. 1.11, 04-2005
10292004-DOXT-FS0U
3. The ODT disable function disables all terminators on th device.
4. If the user activates bits in an extended mode register in an optional field, either the optional field is activated
(if option implemented on the device) or no action is taken by the device (if ioption not implemented).
5. WR (write recovery time for write with autoprecharge) in clock cycles is calculated by dividing tWR (in ns) and
rounding up to the next integer (WR[cycles]=tWR[ns]/tCK[ns]). The mode register must be programmed to this
value.
Figure 12
Extended Mode Register Set Timing
3.4.1
The DLL must be enabled for normal operation. DLL enable is required during power-up initialization and upon
returning to normal operation after having disabled the DLL. (When the device exits self-refresh mode, the DLL is
enabled automatically). Anytime the DLL is enabled, 200 cycles must occur before a READ command can be
issued.
DLL enable
3.4.2
The WR parameter is programmed using the register bits A4 and A5. This integer parameter defines as a number
of clock cycles the Write Recovery time in a Write with Autoprecharge operation.
The following inequality has to be complied with : WR * t
CK
≥
t
WR
, where t
CK
is the clock cycle time as defined in
Table 8
and t
WR
the Write Recovery time as defined in
Table 23
.
Note:Refer to
Figure 3.7.4
for more details.
WR
3.4.3
The data termination, Rtt , is used to set the value of the internal terminaton resistors. The GDDR III DRAM
supports ZQ / 4 and ZQ / 2 termination values. The termination may also be disabled for testing and other
purposes.
Termination Rtt
3.4.4
The Output Driver Impedance extended mode register is used to set the value of the data output driver impedance.
When the autocalibration is used, the output driver impedance is set nominally to ZQ / 6.
Output Driver Impedance
Table 16
Parameter
EMRS Timing Parameters for –1.6, –2.0 and –2.2 speed sorts
Symbol
Limit Values
–2.0
min
4
Unit
Notes
–1.6
–2.2
min
5
max
—
max
—
min
4
max
—
Mode Register Set cycle time
t
MRD
t
CK
#,+
#,+
$ONgT#ARE
0!
%-23
./0
!#
./0
T
20
T
-2$
#OMMAND
%-23%XTENDED-23COMMAND
0!02%!,,COMMAND
!#!NYCOMMAND
./0
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