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| 型號(hào)： | AM42BDS6408G |
| 英文描述： | 250NS, PGA, 883C; LEV B FULLY COMPLIANT(EEPROM) |
| 中文描述： | Am42BDS6408G -堆疊式多芯片封裝（MCP）閃存和SRAM |
| 文件頁(yè)數(shù)： | 63/73頁(yè) |
| 文件大?。?/td> | 1080K |
| 代理商： | AM42BDS6408G |
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62
Am42BDS6408G
November 1, 2002
P R E L I M I N A R Y
AC CHARACTERISTICS
Note:
Breakpoints in waveforms indicate that system may alternately read array data from the “non-busy bank” while checking
the status of the program or erase operation in the “busy” bank. The system should read status twice to ensure valid information.
Figure 33.
Back-to-Back Read/Write Cycle Timings
OE#
CE#
WE#
t
OEH
Data
Addresses
AVD#
PD/30h
AAh
RA
PA/SA
t
WC
t
DS
t
DH
t
RC
t
RC
t
OE
t
OEH
t
AS
t
AH
t
ACC
t
WP
t
GHWL
t
OEZ
t
WC
t
SR/W
Last Cycle in
Program or
Sector Erase
Command Sequence
Read status (at least two cycles) in same bank
and/or array data from other bank
Begin another
write or program
command sequence
RD
RA
555h
RD
t
WPH
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