參數資料
型號: AM42BDS6408G
英文描述: 250NS, PGA, 883C; LEV B FULLY COMPLIANT(EEPROM)
中文描述: Am42BDS6408G -堆疊式多芯片封裝(MCP)閃存和SRAM
文件頁數: 12/73頁
文件大小: 1080K
代理商: AM42BDS6408G
November 1, 2002
Am42BDS6408G
11
P R E L I M I N A R Y
MCP DEVICE BUS OPERATIONS
This section describes the requirements and use of
the device bus operations, which are initiated through
the internal command register. The command register
itself does not occupy any addressable memory loca-
tion. The register is a latch used to store the
commands, along with the address and data informa-
tion needed to execute the command. The contents of
the register serve as inputs to the internal state ma-
chine. The state machine outputs dictate the function
of the device. Table 1 lists the device bus operations,
the inputs and control levels they require, and the re-
sulting output. The following subsections describe
each of these operations in further detail.
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