參數(shù)資料
型號: ADSP-21mod970
廠商: Analog Devices, Inc.
英文描述: Multi-Port Internet Gateway Processor(多口網(wǎng)關(guān)處理器)
中文描述: 多端口Internet網(wǎng)關(guān)處理器(多口網(wǎng)關(guān)處理器)
文件頁數(shù): 9/50頁
文件大?。?/td> 980K
代理商: ADSP-21MOD970
5(9 3U $
7KLV LQIRUPDWLRQ DSSOLHV WR D SURGXFW XQGHU GHYHORSPHQW ,WV FKDUDFWHULVWLFV DQG VSHFLILFDWLRQV DUH VXEMHFW WR FKDQJH ZLWKRXW
QRWLFH $QDORJ 'HYLFHV DVVXPHV QR REOLJDWLRQ UHJDUGLQJ IXWXUH PDQXIDFWXULQJ XQOHVV RWKHUZLVH DJUHHG WR LQ ZULWLQJ
ADSP-21mod970 Preliminary Data Sheet
2FWREHU
Preimnary
1
O
IDMA Port Acknowledge Configurable in Mode D; Open Drain
Technca
I
IDMA Select
Memory Interface Pins
The ADSP-21mod970 modem pool can be used in one of two modes, Master Mode or Slave Mode. In
Master Mode, Modem Processor 1 operates with full memory (BDMA operation with full external
overlay memory and I/O capability). In Slave Mode, Modem Processor 1 operates in host configuration
(IDMA operation with limited external addressing capabilities). The operating mode is determined by
the state of the Mode C pin during RESET and cannot be changed while the modem pool is running. See
the “Memory Architecture” section for more information.
Full Memory Pins (Mode C = 0) Modem Processor 1 Only
Host Pins (Mode C = 1) Modem Processor 1 and Modem Processors 2-6
In Host Mode, external peripheral addresses can be decoded using the A0, CMS, PMS, DMS, and IOMS signals of Modem Processor 1.
Interrupts
The interrupt controller allows each modem processor in the modem pool to respond individually to
eleven possible interrupts and reset with minimum overhead. The ADSP-21mod970 provides four
dedicated external interrupt input pins, IRQ2, IRQL1, IRQL0, and IRQE (shared with the PF7:4 pins)
for each modem processor. The ADSP-21mod970 also supports internal interrupts from the timer, the
byte DMA port, the serial port, software, and the power-down control circuit. The interrupt levels are
internally prioritized and individually maskable (except power down and reset). The IRQ2, IRQ1, and
IRQ0 input pins can be programmed to be either level- or edge-sensitive. IRQL0 and IRQL1 are level-
sensitive and IRQE is edge sensitive. The priorities and vector addresses of all interrupts are shown in
Table I.
Pin Name
Output
O
I/O
A13:0
D23:0
14
24
Address Output Pins for Program, Data, Byte and I/O Spaces
Data I/O Pins for Program, Data, Byte and I/O Spaces
(8 MSBs are also used as Byte Memory addresses)
Pin Name
# of Pins
Input/
Output
I/O
O
Function
IAD15:0
A0
32
1
IDMA Port Address/Data Bus
Address Pin for External I/O, Program, Data, or Byte access (Modem
Processor 1 only)
Data I/O Pins for Program, Data Byte and I/O spaces
IDMA Write Enable
IDMA Read Enable
IDMA Address Latch Pin
D23:8
IWR
IRD
IAL
IS
IACK
32
1
1
1
6
I/O
I
I
I
相關(guān)PDF資料
PDF描述
ADSP-21msp58 DSP Microcomputer(DSP 微計算機)
ADSP-21MSP59 DSP Microcomputer(DSP 微計算機)
ADSP-BF535 Blackfin Embedded Processor
ADSP-BF535PBB-200 Blackfin Embedded Processor
ADSP-BF535PBB-300 Blackfin Embedded Processor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADSP-21MOD970-000 制造商:Analog Devices 功能描述:
ADSP-21MOD980-000 制造商:Analog Devices 功能描述:
ADSP21MOD980N 制造商:AD 制造商全稱:Analog Devices 功能描述:MultiPort Internet Gateway Processor
ADSP-21MSP50ABG-52 制造商:Analog Devices 功能描述:
adsp-21msp50akg-52 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: