參數(shù)資料
型號: ADSP-21mod970
廠商: Analog Devices, Inc.
英文描述: Multi-Port Internet Gateway Processor(多口網(wǎng)關(guān)處理器)
中文描述: 多端口Internet網(wǎng)關(guān)處理器(多口網(wǎng)關(guān)處理器)
文件頁數(shù): 18/50頁
文件大?。?/td> 980K
代理商: ADSP-21MOD970
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ADSP-21mod970 Preliminary Data Sheet
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Preimnary
not available for Modem Processors 2–6.
Program Memory (Full Memory Mode)
is a 24-bit-wide space for storing both instruction opcodes
and data. The ADSP-21mod970 has 32K words of Program Memory RAM on chip, and it can access up
to two 8K external memory overlay spaces using the external data bus.
Data Memory (Full Memory Mode)
is a 16-bit-wide space used for the storage of data variables and
for memory-mapped control registers. The ADSP-21mod970 has 32K words on Data Memory RAM on
chip, consisting of 16,352 user-accessible locations and 32 memory-mapped registers. The ADSP-
21mod970 also supports up to two 8K external memory overlay spaces through the external data bus.
All internal accesses complete in one cycle. Accesses to external memory are timed using the wait states
specified by the DWAIT register.
Technca
Figure 8 IDMA Control/OVLAY Registers
IDMA Port Booting
The ADSP-21mod970 can also boot programs through its Internal DMA port. If Mode C = 1, Mode B
= 0, and Mode A = 1, the ADSP-21mod970 boots from the IDMA port. IDMA feature can load as much
on-chip memory as desired. Program execution is held off until on-chip program memory location 0 is
written to.
Master Mode
This section describes the Master Mode memory configuration of Modem Processor 1. Master Mode is
I/O Space (Full Memory Mode)
The ADSP-21mod970 supports an additional external memory space called I/O space. This space is
designed to support simple connections to peripherals (such as data converters and external registers) or
to bus interface ASIC data registers. I/O space supports 2048 locations of 16-bit wide data. The lower
eleven bits of the external address bus are used; the upper three bits are undefined. Two instructions were
added to the core ADSP-2100 Family instruction set to read from and write to I/O memory space. The
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1
0
IDMA OVERLAY
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DM(0x3FE7)
ID DMOVLAY
ID PMOVLAY
RESERVED
SET TO 0
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12
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10
9
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7
6
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4
3
2
1
0
IDMA CONTROL (U=UNDEFINED AT RESET)
DM(0x3FE0)
IDMAA
ADDRESS
IDMAD
Destination memory type:
0=PM
1=DM
U
U
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