參數(shù)資料
型號(hào)： ADSP-21mod970
廠商： Analog Devices, Inc.
英文描述： Multi-Port Internet Gateway Processor(多口網(wǎng)關(guān)處理器)
中文描述： 多端口Internet網(wǎng)關(guān)處理器（多口網(wǎng)關(guān)處理器）
文件頁(yè)數(shù)： 19/50頁(yè)
文件大?。?/td> 980K
代理商： ADSP-21MOD970
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ADSP-21mod970 Preliminary Data Sheet
2FWREHU
Preimnary
selected.
7DEOH
shows the data formats supported by the BDMA circuit.
Technca
I/O space also has four dedicated three-bit wait state registers, IOWAIT0-3, which specify up to seven
wait states to be automatically generated for each of four regions. The wait states act on address ranges
as shown in
7DEOH
.
Table 4 Wait States
Byte Memory
The byte memory space is a bidirectional, 8-bit-wide, external memory space used to store programs and
data. Byte memory is accessed using the BDMA feature. The byte memory space consists of 256 pages,
each of which is 16K x 8.
The byte memory space on the ADSP-21mod970 supports read and write operations as well as four
different data formats. The byte memory uses data bits 15:8 for data. The byte memory uses data bits
23:16 and address bits 13:0 to create a 22-bit address. This allows up to a 4 meg x 8 (32 megabit) ROM
or RAM to be used without glue logic. All byte memory accesses are timed by the BMWAIT register.
Byte Memory DMA (BDMA, Full Memory Mode)
The Byte memory DMA controller allows loading and storing of program instructions and data using the
byte memory space. The BDMA circuit can access the byte memory space while the processor is
operating normally and steals only one processor cycle per 8-, 16- or 24-bit word transferred.
The BDMA circuit supports four different data formats that are selected by the BTYPE register field.
The appropriate number of 8-bit accesses are done from the byte memory space to build the word size
Table 5 Data Formats
Unused bits in the 8-bit data memory formats are filled with 0s. The BIAD register field is used to specify
the starting address for the on-chip memory involved with the transfer. The 14-bit BEAD register
specifies the starting address for the external byte memory space. The 8-bit BMPAGE register specifies
the starting page for the external byte memory space. The BDIR register field selects the direction of the
transfer. Finally the 14-bit BWCOUNT register specifies the number of DSP words to transfer and
initiates the BDMA circuit transfers.
BDMA accesses can cross page boundaries during sequential addressing. A BDMA interrupt is
generated on the completion of the number of transfers specified by the BWCOUNT register.
The BWCOUNT register is updated after each transfer so it can be used to check the status of the
Address Range
Wait State Register
0x000–0x1FF
0x200–0x3FF
0x400–0x5FF
0x600–0x7FF
IOWAIT0
IOWAIT1
IOWAIT2
IOWAIT3
BTYPE
Internal
Memory Space
Word Size
Alignment
00
01
10
11
Program Memory
Data Memory
Data Memory
Data Memory
24
16
8
8
Full Word
Full Word
MSBs
LSBs
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