參數(shù)資料
型號: ADSP-21mod970
廠商: Analog Devices, Inc.
英文描述: Multi-Port Internet Gateway Processor(多口網(wǎng)關處理器)
中文描述: 多端口Internet網(wǎng)關處理器(多口網(wǎng)關處理器)
文件頁數(shù): 43/50頁
文件大?。?/td> 980K
代理商: ADSP-21MOD970
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ADSP-21mod970 Preliminary Data Sheet
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Data
Technca
TIMING PARAMETERS ADSP-21mod970
IDMA Read, Long Read Cycle
NOTES
1
Start of Read = IS Low and IRD Low.
2
End of Read = IS High or IRD High.
3
DM read or first half of PM read.
4
Second half of PM read.
Figure 27 IDMA Read, Long Read Cycle
Parameter
IDMA Read, Long Read Cycle
Timing Requirements:
t
IKR
t
IRP
Min
Max
Unit
IACK Low before Start of Read
1
Duration of Read
1
Switching Characteristics:
t
IKHR
t
IKDS
t
IKDH
t
IKDD
t
IRDE
t
IRDV
t
IRDH1
t
IRDH2
IACK High after Start of Read
1
IAD15–0 Data Setup before IACK Low
IAD15–0 Data Hold after End of Read
2
IAD15–0 Data Disabled after End of Read
2
IAD15–0 Previous Data Enabled after Start of Read
IAD15–0 Previous Data Valid after Start of Read
IAD15–0 Previous Data Hold after Start of Read (DM/PM1)
3
IAD15–0 Previous Data Hold after Start of Read (PM2)
4
0
15
17
0.5t
CK
- 10
0
10
0
15
2t
CK
- 5
t
CK
- 5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
IRP
t
IKR
PREVIOUS
DATA
READ
DATA
IKHR
IKDS
t
IRDV
t
IRDH
t
IKDD
t
IRDE
t
IKDH
IAD 15-0
IACK
IS
IRD
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