參數(shù)資料
型號: 28F1604C3
廠商: Intel Corp.
英文描述: 3 Volt Advanced+ Stacked Chip Scale Package Memory(3V閃速存儲器和靜態(tài)存儲器)
中文描述: 3伏高級堆疊芯片級封裝存儲器(3V的閃速存儲器和靜態(tài)存儲器)
文件頁數(shù): 29/64頁
文件大?。?/td> 927K
代理商: 28F1604C3
28F1602C3, 28F1604C3, 28F3204C3
Preliminary
23
4.5
Flash AC Characteristics—Read Operations
NOTES:
1. See
Figure 6
, below.
2. F-OE# may be delayed up to t
ELQV
–t
GLQV
after the falling edge of CE# without impact on t
ELQV
.
3. Sampled, but not 100% tested.
4. See
Figure 4, “Input/Output Reference Waveform” on page 22
for timing measurements and maximum
allowable input slew rate.
#
Sym
Parameter
Density
16 Mbit
32 Mbit
Unit
Product
-90
-110
-100
-110
Voltage Range
2.7 V – 3.3 V
Note
Min
Max
Min
Max
Min
Max
Min
Max
R1
t
AVAV
Read Cycle Time
90
110
100
110
ns
R2
t
AVQV
Address to Output Delay
90
110
100
110
ns
R3
t
ELQV
F-CE# to Output Delay
2
90
110
100
110
ns
R4
t
GLQV
F-OE# to Output Delay
2
30
30
30
30
ns
R5
t
PHQV
F-RP# to Output Delay
150
150
150
150
ns
R6
t
ELQX
F-CE# to Output in Low Z
3
0
0
0
0
ns
R7
t
GLQX
F-OE# to Output in Low Z
3
0
0
0
0
ns
R8
t
EHQZ
F-CE# to Output in High Z
3
25
25
25
25
ns
R9
t
GHQZ
F-OE# to Output in High Z
3
20
20
20
20
ns
R10
t
OH
Output Hold from Address, F-CE#,
or F-OE# Change, Whichever
Occurs First
3
0
0
0
0
ns
Figure 6. AC Waveform: Flash Read Operations
Address Stable
Device and
Address Selection
IH
V
IL
V
V
ADDRESSES (A)
IH
IL
V
V
IH
IL
V
V
IH
IL
V
V
CE# (E)
OE# (G)
WE# (W)
DATA (D/Q)
IH
V
IL
V
RP#(P)
OL
V
OH
High Z
Valid Output
Data
Valid
Standby
High Z
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
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