
Memory Controller
15-26
MPC801 USER’S MANUAL
MOTOROLA
15
5
BST1
BST1 = 0 means the value of the BS signals at the rising edge of GCLK1 will be ‘0’
BST1 = 1 means the value of the BS signals at the rising edge of GCLK1 will be ‘1’
NOTE:
The final value of the BS signals depends on the value of the PS bits in the BR accessed,
the value of the TSIZ signals for the access and the value of the A[30:31] signals.
6
BST2
BST2 = 0 means the value of the BS signals at the rising edge of GCLK2 will be ‘0’
BST2 = 1 means the value of the BS signals at the rising edge of GCLK2 will be ‘1’
NOTE:
The final value of the BS signals depends on the value of the PS bits in the BR accessed,
the value of the TSIZ signals for the access, and the value of the A[30:31] signals.
7
BST3
BST3 = 0 means the value of the BS signals at the trailing edge of GCLK1 will be ‘0’
BST3 = 1 means the value of the BS signals at the trailing edge of GCLK1 will be ‘1’
NOTE:
The final value of the BS signals depends on the value of the PS bits in the BR accessed,
the value of the TSIZ signals for the access, and the value of the A[30:31] signals.
8-9
G0L(0:1)
G0L = 10 means the value of the GPL0 signal at the trailing edge of GCLK2 will be ‘0’
G0L = 11 means the value of the GPL0 signal at the trailing edge of GCLK2 will be ‘1’
G0L = 00 means the value of the GPL0 signal at the trailing edge of GCLK2 will be as defined in the
G0CL field in the MxMR’
10-11
G0H(0:1)
G0H = 10 means the value of the GPL0 signal at the trailing edge of GCLK1 will be ‘0’
G0H = 11 means the value of the GPL0 signal at the trailing edge of GCLK1 will be ‘1’
G0H = 00 means the value of the GPL0 signal at the trailing edge of GCLK1 will be as defined in the
G0CL field in the MxMR’
12
G1T4
G1T4 = 0 means the value of the GPL1 signal at the trailing edge of GCLK2 will be ‘0’
G1T4 = 1 means the value of the GPL1 signal at the trailing edge of GCLK2 will be ‘1’
13
G1T3
G1T3 = 0 means the value of the GPL1 signal at the trailing edge of GCLK1 will be ‘0’
G1T3 = 1 means the value of the GPL1 signal at the trailing edge of GCLK1 will be ‘1’
14
G2T4
G2T4 = 0 means the value of the GPL2 signal at the trailing edge of GCLK2 will be ‘0’
G2T4 = 1 means the value of the GPL2 signal at the trailing edge of GCLK2 will be ‘1’
15
G2T3
G2T3 = 0 means the value of the GPL2 signal at the trailing edge of GCLK1 will be ‘0’
G2T3 = 1 means the value of the GPL2 signal at the trailing edge of GCLK1 will be ‘1’
16
G3T4
G3T4 = 0 means the value of the GPL3 signal at the trailing edge of GCLK2 will be ‘0’
G3T4 = 1 means the value of the GPL3 signal at the trailing edge of GCLK2 will be ‘1’
17
G3T3
G3T3 = 0 means the value of the GPL3 signal at the trailing edge of GCLK1 will be ‘0’
G3T3 = 1 means the value of the GPL3 signal at the trailing edge of GCLK1 will be ‘1’
18
G4T4/DLT3
When GPL4_xDIS = 0 in the corresponding MxMR:
G4T4/DLT3 = 0 means the value of the GPL4 signal at the trailing edge of GCLK2 will be ‘0’
G4T4/DLT3 = 1 means the value of the GPL4 signal at the trailing edge of GCLK2 will be ‘1’
When GPL4_xDIS = 1 in the corresponding MxMR:
G4T4/DLT3 = 1 in the current word, indicates that the data bus should be sampled at the falling
edge of GCLK2 (if a read burst or a single read service is executed).
G4T4/DLT3 = 0 in the current word, indicates that the data bus should be sampled at the rising
edge of GCLK2 (if a read burst or a single read service is executed).
Table 15-2. UPM RAM Word (Continued)
BITS
MNEMONIC
FUNCTION