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參數(shù)資料
| 型號： | TMXF84622 |
| 英文描述： | TMXF84622 155 Mbits/s/622 Mbits/s Interface SONET/SDH x84/x63 Ultramapper |
| 中文描述： | TMXF84622 155 Mbits/s/622 Mbits /秒接口的SONET / SDH x84/x63 Ultramapper |
| 文件頁數(shù)： | 29/62頁 |
| 文件大?。?/td> | 902K |
| 代理商： | TMXF84622 |
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Agere Systems Inc.
29
Advance Data Sheet, Rev. 2
July 2001
SONET/SDH x84/x63 Ultramapper
TMXF84622 155 Mbits/s/622 Mbits/s Interface
3 Pin Information
(continued)
3.1 Introduction
Table 1 lists pin descriptions including the pin, symbol (or signal name), type, I/O, and description. Table 2, starting
on page 44, lists just the pin and symbol, sorted by pin number order. Table 3, starting on page 52, lists pins and
symbol names, sorted by symbol name order.
Table 1. Pin Descriptions
* O
1
indicates external pull-up recommended (unused or system required),
I/O
2
indicates external pull-down recommended (unused or system required),
I
D
; I/O
D
indicate internal pull-down,
I
U
indicates internal pull-up.
Pin
Symbol
Type
I/O
*
Description
TMUX Block
High-Speed Receive I/O (4)
I
622/155 Mbits/s STS-12/STS-3 Input Data.
Input for optional
clock and data recovery (CDR). LVDS input.
I
155 MHz Clock for STS-3 Input Data.
LVDS input.
AM5
AM6
AN4
AN5
RHSDP
RHSDN
RHSCP
RHSCN
LVDS
LVDS
High-Speed Transmit I/O (7)
I
Transmit 622/155 MHz Clock and Reference Clock for
CDR (optional).
LVDS input.
O
Output 622/155 MHz Clock.
LVDS output.
AP6
AP7
AP4
AP5
AL15
THSCP
THSCN
THSCOP
THSCON
THSSYNC
LVDS
LVDS
—
I/O
Transmit 8K Frame Sync for STS-12/STM-4, or STS-3/
STM-1Mode.
If the register MPU_MASTER_SLAVE= 1,
THSSYNC is an output, otherwise, THSSYNC is an input.
Transmit Output Data for STS-12, STM-4, or STS-3 Mode.
LVDS output.
Protection Switch I/O (8)
I
Receive Side 622/155 Mbits/s Serial Data Input from Pro-
tection Board.
I
Receive Side 155 MHz Clock Input from Protection Board.
AN7
AN8
THSDP
THSDN
LVDS
O
AM8
AM9
AN10
AN11
AP10
AP11
AP8
AP9
RPSDP
RPSDN
RPSCP
RPSCN
TPSDP
TPSDN
TPSCP
TPSCN
LVDS
LVDS
LVDS
O
Transmit Side 622/155 Mbits/s Serial Data Output to Pro-
tection Board.
Transmit Side 622/155 MHz Clock Output to Protection
Board.
LVDS
O
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