參數(shù)資料
型號(hào)： TMXF84622
英文描述： TMXF84622 155 Mbits/s/622 Mbits/s Interface SONET/SDH x84/x63 Ultramapper
中文描述： TMXF84622 155 Mbits/s/622 Mbits /秒接口的SONET / SDH x84/x63 Ultramapper
文件頁(yè)數(shù)： 22/62頁(yè)
文件大?。?/td> 902K
代理商： TMXF84622
22
Agere Systems Inc.
Advance Data Sheet, Rev. 2
July 2001
SONET/SDH x84/x63 Ultramapper
TMXF84622 155 Mbits/s/622 Mbits/s Interface
2 The SONET/SDH Ultramapper
(continued)
In the byte-synchronization mode, the frame synchronization and signaling (VT SPE) information are also passed
to the mapper. In the receive direction, the mapper block provides the line data, line clock, frame synchronization
(byte-synchronization mode), and signaling information (byte-synchronization mode) to the Ultra Framer. Perfor-
mance reports, in the form of HDLC packets (PRMs), are sent from the receive performance monitor block to the
transmit HDLC block.
5-8928.a (F)
Figure 12. Ultramapper Switching Mode CHI Configuration with Byte-Synchronous VT Mapping Enabled
SIGNALING
PROCESSOR
(EXTRACTION)
RECEIVE
FACILITY DATA
LINK
RECEIVE
HDLC
TRANSMIT
SYSTEM
INTERFACE
RECEIVE
FRAME
ALIGNER
TRANSMIT
FRAME
FORMATTER
TRANSMIT
FACILITY DATA
LINK
SIGNAL
PROCESSOR
(INSERTION)
RECEIVE
SYSTEM
INTERFACE
MAPPER
TO
FRAMER
DS1
CROSS
CONNECT
ESF PRM PATH
ULTRAMAPPER: FRAMER
ULTRAMAPPER
M12 MULTIPLEXER
INTERFACE
ULTRAMAPPER
VT MAPPER
INTERFACE
D
PERFORMANCE
MONITOR
TRANSMIT
HDLC
I
T
R
VT MAPPER:
BYTE-SYNCHRONOUS
ROBBED-bit SIGNALING
RECEIVE DATA
RECEIVE SIGNALING DATA
(TO SIGNALING REGISTERS)
SIGNALING STOMP
DATA
VT MAPPER:
BYTE-SYNCHRONOUS
ROBBED-bit SIGNALING
TRANSMIT DATA
TRANSMIT SIGNALING DATA
(EXTRACTED FROM SYSTEM
OF SIGNALING REGISTERS)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMXF846221BL-3-DB 制造商:LSI Corporation 功能描述:Mapper DS3/E3/DS2/DS1/DS0/E1 SONET/SDH 155Mbps/622Mbps 1.5V/3.3V 700-Pin BGA Bag
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TMXM-11 制造商:Brady Corporation 功能描述:
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TMXM-1-25-PK 制造商:Brady Corporation 功能描述:MICRO CONSECUTIVE NOS. REPEAT - LEGEND: 1-25
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