參數(shù)資料
型號(hào): TMS320C6713BGDPA200
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號(hào)處理
英文描述: FLOATING-POINT DIGITAL SIGNAL PROCESSORS
中文描述: 浮點(diǎn)數(shù)字信號(hào)處理器
文件頁(yè)數(shù): 92/150頁(yè)
文件大小: 2039K
代理商: TMS320C6713BGDPA200
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TMS320C6713, TMS320C6713B
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS186I
DECEMBER 2001
REVISED MAY 2004
92
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
power-supply design considerations
A dual-power supply with simultaneous sequencing can be used to eliminate the delay between core and I/O
power up. A Schottky diode can also be used to tie the core rail to the I/O rail (see Figure 22).
DV
DD
CV
DD
V
SS
C6000
DSP
Schottky
Diode
I/O Supply
Core Supply
GND
Figure 22. Schottky Diode Diagram
Core and I/O supply voltage regulators should be located close to the DSP (or DSP array) to minimize
inductance and resistance in the power delivery path. Additionally, when designing for high-performance
applications utilizing the C6000
platform of DSPs, the PC board should include separate power planes for
core, I/O, and ground, all bypassed with high-quality low-ESL/ESR capacitors.
power-supply decoupling
In order to properly decouple the supply planes from system noise, place as many capacitors (caps) as possible
close to the DSP. Assuming 0603 caps, the user should be able to fit a total of 60 caps — 30 for the core supply
and 30 for the I/O supply. These caps need to be close (no more than 1.25 cm maximum distance) to the DSP
to be effective. Physically smaller caps are better, such as 0402, but the size needs to be evaluated from a
yield/manufacturing point-of-view. Parasitic inductance limits the effectiveness of the decoupling capacitors,
therefore physically smaller capacitors should be used while maintaining the largest available capacitance
value. As with the selection of any component, verification of capacitor availability over the product’s production
lifetime needs to be considered.
IEEE 1149.1 JTAG compatibility statement
The TMS320C6713/13B DSP requires that both TRST and RESET resets be asserted upon power up to be
properly initialized. While RESET initializes the DSP core, TRST initializes the DSP’s emulation logic. Both
resets are required for proper operation.
While both TRST and RESET need to be asserted upon power up, only RESET needs to be released for the
DSP to boot properly. TRST may be asserted indefinitely for normal operation, keeping the JTAG port interface
and DSP’s emulation logic in the reset state.
TRST only needs to be released when it is necessary to use a JTAG controller to debug the DSP or exercise
the DSP’s boundary scan functionality.
For maximum reliability, the TMS320C6713/13B DSP includes an internal pulldown (IPD) on the TRST pin to
ensure that TRST will always be asserted upon power up and the DSP’s internal emulation logic will always be
properly initialized.
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