參數(shù)資料
型號： TMS320C6713BGDPA200
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： FLOATING-POINT DIGITAL SIGNAL PROCESSORS
中文描述： 浮點數(shù)字信號處理器
文件頁數(shù)： 126/150頁
文件大?。?/td> 2039K
代理商： TMS320C6713BGDPA200
TMS320C6713, TMS320C6713B
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS186I
DECEMBER 2001
REVISED MAY 2004
126
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
INTER-INTEGRATED CIRCUITS (I2C) TIMING
timing requirements for I2C timings
(see Figure 51)
NO.
PYPA
167
PYP
200
GDPA
200
GDP
225
GDP
300
UNIT
STANDARD
MODE
FAST
MODE
MIN
MAX
MIN
2.5
MAX
1
t
c(SCL)
Cycle time, SCL
Setup time, SCL high before SDA low (for a repeated START
condition)
10
μ
s
2
t
su(SCLH-SDAL)
4.7
0.6
μ
s
3
t
h(SCLL-SDAL)
Hold time, SCL low after SDA low (for a START and a repeated
START condition)
4
0.6
μ
s
4
5
6
7
8
9
10
11
12
13
14
15
t
w(SCLL)
t
w(SCLH)
t
su(SDAV-SDLH)
t
h(SDA-SDLL)
t
w(SDAH)
t
r(SDA)
t
r(SCL)
t
f(SDA)
t
f(SCL)
t
su(SCLH-SDAH)
t
w(SP)
C
b#
Pulse duration, SCL low
Pulse duration, SCL high
Setup time, SDA valid before SCL high
Hold time, SDA valid after SCL low (For I
2
C bus
devices)
Pulse duration, SDA high between STOP and START conditions
Rise time, SDA
Rise time, SCL
Fall time, SDA
Fall time, SCL
Setup time, SCL high before SDA high (for STOP condition)
Pulse duration, spike (must be suppressed)
Capacitive load for each bus line
4.7
1.3
0.6
μ
s
μ
s
ns
μ
s
μ
s
ns
ns
ns
ns
μ
s
ns
pF
4
250
0
§
4.7
100
0
§
1.3
0.9
1000
1000
300
300
20 + 0.1C
b#
20 + 0.1C
b#
20 + 0.1C
b#
20 + 0.1C
b#
300
300
300
300
4
0.6
0
50
400
400
The I
2
C pins SDA and SCL do not feature fail-safe I/O buffers. These pins could potentially draw current when the device is powered down.
A Fast-mode I
2
C-bus device can be used in a Standard-mode I
2
C-bus system, but the requirement t
su(SDA
SCLH)
≥
250 ns must then be met.
This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period
of the SCL signal, it must output the next data bit to the SDA line t
r
max + t
su(SDA
SCLH)
= 1000 + 250 = 1250 ns (according to the Standard-mode
I
2
C-Bus Specification) before the SCL line is released.
§
A device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the V
IHmin
of the SCL signal) to bridge the undefined
region of the falling edge of SCL.
The maximum t
h(SDA
SCLL)
has only to be met if the device does not stretch the low period [t
w(SCLL)
] of the SCL signal.
#
C
b
= total capacitance of one bus line in pF. If mixed with HS-mode devices, faster fall-times are allowed.
相關(guān)PDF資料
PDF描述
TMS320C6727BGDH275 Floating-Point Digital Signal Processors
TMS320F28044GGMA Digital Signal Processor
TMS320F28044GGMQ Digital Signal Processor
TMS320F28044GGMS Digital Signal Processor
TMS320F28044PZQ Digital Signal Processor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMS320C6713BGDP-C20 制造商:Texas Instruments 功能描述:
TMS320C6713BPYP167 制造商:TI 功能描述:_
TMS320C6713BPYP200 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Floating-Pt Dig Sig Processors RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
TMS320C6713BPYP225 制造商:Texas Instruments 功能描述:
TMS320C6713BZDP225 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Floating-Pt Dig Sig Processors RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*