參數(shù)資料
型號: TMS320C6713BGDPA200
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: FLOATING-POINT DIGITAL SIGNAL PROCESSORS
中文描述: 浮點數(shù)字信號處理器
文件頁數(shù): 82/150頁
文件大?。?/td> 2039K
代理商: TMS320C6713BGDPA200
TMS320C6713, TMS320C6713B
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS186I
DECEMBER 2001
REVISED MAY 2004
82
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
multichannel audio serial port (McASP) peripherals
The TMS320C6713/13B device includes two multi-channel audio serial port (McASP) interface peripherals
(McASP1 and McASP0). The McASP is a serial port optimized for the needs of multi-channel audio applications.
With two McASP peripherals, the TMS320C6713/13B device is capable of supporting two completely
independent audio zones simultaneously.
Each McASP consists of a transmit and receive section. These sections can operate completely independently
with different data formats, separate master clocks, bit clocks, and frame syncs or alternatively, the transmit and
receive sections may be synchronized. Each McASP module also includes a pool of 16 shift registers that may
be configured to operate as either transmit data, receive data, or general-purpose I/O (GPIO).
The transmit section of the McASP can transmit data in either a time-division-multiplexed (TDM) synchronous
serial format or in a digital audio interface (DIT) format where the bit stream is encoded for S/PDIF, AES-3,
IEC-60958, CP-430 transmission. The receive section of the McASP supports the TDM synchronous serial
format.
Each McASP can support one transmit data format (either a TDM format or DIT format) and one receive format
at a time. All transmit shift registers use the same format and all receive shift registers use the same format.
However, the transmit and receive formats need not be the same.
Both the transmit and receive sections of the McASP also support burst mode which is useful for non-audio data
(for example, passing control information between two DSPs).
The McASP peripherals have additional capability for flexible clock generation, and error detection/handling,
as well as error management.
McASP block diagram
Figure 16 illustrates the major blocks along with external signals of the TMS320C6713/13B McASP1 and
McASP0 peripherals; and shows the 8 serial data [AXR] pins for each McASP. Each McASP also includes full
general-purpose I/O (GPIO) control, so any pins not needed for serial transfers can be used for general-purpose
I/O.
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