
Rev. 1.00 Sep. 13, 2007 Page xxv of xxviii
Section 23 Clock Pulse Generator .......................................................................909
23.1
Register Description ......................................................................................................... 911
23.1.1
System Clock Control Register (SCKCR) ........................................................ 911
23.2
Oscillator........................................................................................................................... 914
23.2.1
Connecting Crystal Resonator .......................................................................... 914
23.2.2
External Clock Input ......................................................................................... 915
23.3
PLL Circuit ....................................................................................................................... 915
23.4
Frequency Divider ............................................................................................................ 916
23.5
Usage Notes ...................................................................................................................... 916
23.5.1
Notes on Clock Pulse Generator ....................................................................... 916
23.5.2
Notes on Resonator ........................................................................................... 917
23.5.3
Notes on Board Design ..................................................................................... 917
Section 24 Power-Down Modes ..........................................................................919
24.1
Features............................................................................................................................. 919
24.2
Register Descriptions ........................................................................................................ 922
24.2.1
Standby Control Register (SBYCR) ................................................................. 922
24.2.2
Module Stop Control Registers A and B (MSTPCRA and MSTPCRB) .......... 925
24.2.3
Module Stop Control Register C (MSTPCRC)................................................. 928
24.2.4
Deep Standby Control Register (DPSBYCR)................................................... 929
24.2.5
Deep Standby Wait Control Register (DPSWCR)............................................ 932
24.2.6
Deep Standby Interrupt Enable Register (DPSIER) ......................................... 934
24.2.7
Deep Standby Interrupt Flag Register (DPSIFR).............................................. 936
24.2.8
Deep Standby Interrupt Edge Register (DPSIEGR) ......................................... 938
24.2.9
Reset Status Register (RSTSR)......................................................................... 939
24.2.10
Deep Standby Backup Register (DPSBKRn) ................................................... 940
24.3
Multi-Clock Function ....................................................................................................... 941
24.4
Module Stop State............................................................................................................. 941
24.5
Sleep Mode ....................................................................................................................... 942
24.5.1
Entry to Sleep Mode ......................................................................................... 942
24.5.2
Exit from Sleep Mode....................................................................................... 942
24.6
All-Module-Clock-Stop Mode.......................................................................................... 943
24.7
Software Standby Mode.................................................................................................... 944
24.7.1
Entry to Software Standby Mode...................................................................... 944
24.7.2
Exit from Software Standby Mode ................................................................... 944
24.7.3
Setting Oscillation Settling Time after Exit from Software Standby Mode...... 945
24.7.4
Software Standby Mode Application Example................................................. 947
24.8
Deep Software Standby Mode .......................................................................................... 948
24.8.1
Entry to Deep Software Standby Mode ............................................................ 948
24.8.2
Exit from Deep Software Standby Mode .......................................................... 949