MOTOROLA
7-4
DIGITAL CONTROL
QADC
REFERENCE MANUAL
The pause bit is set in CCW5 and the channel 63 (EOQ) code is in CCW6.
The pause is in CCW39.
During queue 1 operation, the pause bit is set in CCW20 and BQ2 points to
CCW21.
Another pause and end-of-queue boundary condition occurs when the pause and an
end-of-queue condition occur in the same CCW. Both the pause and end-of-queue
conditions are recognized simultaneously. The end-of-queue condition has prece-
dence so a conversion is not performed for the CCW and the pause flag is not set. The
QADC sets the completion flag and the queue status becomes idle. Examples of this
situation are:
The pause bit is set in CCW10 and EOQ is programmed into CCW10.
During queue 1 operation, the pause bit set in CCW32, which is also BQ2.
7.3 Scan Modes
The QADC queuing mechanism allows the application to utilize different requirements
for automatically scanning input channels.
In single-scan mode, a single pass through a sequence of conversions defined by a
queue is performed.
In continuous-scan mode, multiple passes through a sequence of conversions defined
by a queue is executed. The following paragraphs describe single-scan and continu-
ous-scan operations.
7.3.1 Disabled Mode and Reserved Mode
When the disabled mode or a reserved mode is selected, the queue is not active. Trig-
ger events cannot initiate queue execution. When both queue 1 and queue 2 are dis-
abled, wait states are not encountered for IMB accesses of the RAM. When both
queues are disabled, it is safe to change the prescaler values.
7.3.2 Single-Scan Modes
When the application software wants to execute a single pass through a sequence of
conversions defined by a queue, a single-scan queue operating mode is selected. By
programming the MQ1 field in QACR1, the following modes can be selected for queue
1:
Software initiated single-scan mode
External trigger rising edge single-scan mode
External trigger falling edge single-scan mode
In addition to the above modes, queue 2 can also be programmed for the interval timer
single-scan mode, using the periodic/interval timer. The queue operating mode for
queue 2 is selected by the MQ2 field in QACR2.
In all single-scan queue operating modes, the software must also enable the queue to
begin execution by writing the single-scan enable bit to a one in the queue’s control
register. The single-scan enable bits, SSE1 and SSE2, are provided for queue 1 and
queue 2 respectively.
F
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