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參數(shù)資料
| 型號： | MX98727 |
| 英文描述： | SINGLE CHIP PCI/CARDBUS FAST ETHERNET CONTROLLER |
| 中文描述： | 單芯片的PCI / CARDBUS快速以太網控制器 |
| 文件頁數(shù)： | 43/71頁 |
| 文件大?。?/td> | 389K |
| 代理商： | MX98727 |
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43
P/N:PM0723
REV. 1.0, JUL. 13, 2000
MX98728EC
5.0 Host/Local DMAs and the packet memory bus arbitration
Packet Memory Bus Arbitration State Diagram
Host Access
(1st priority)
Host is critical
TX is critical & No one else is critical
Host is critical
TX is critical & No one else is critical
TX is critical & No one else is critical
RX is critical & Host is not critical
RX is critical & Host is not critical
RX is critical & Host is not critical
RX DMA
(2nd priority)
TX DMA
(3rd priority)
Host is critical
If no one is critical, then round-robin
scheme is used in prioritization.
Rules of the packet memory access prioritization
Rule 1: The TX local DMA is said to be "critical" if the TX FIFO counter falls below the TTHD level.
If the TX packet is in the "stored and forward" mode (TTHD[1:0]=11 ), the TX local DMA is never critical.
Rule 2 : The RX local DMA is said to be "critical" if the RX FIFO counter rises above the RTHD level.
Rule 3 : The host access is said to be "critical" if the DINTVAL timer is timed out.
Rule 4 : If all three accesses are critical, the host has the 1st priority. The RX local DMA has the 2nd priority and the
TX local DMA has the last priority. If no one is critical, round-robin is used.
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相關代理商/技術參數(shù) |
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|---|---|
| MX98728 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION |
| MX98728AEC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Controller Miscellaneous - Datasheet Reference |
| MX98728EC | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION |
| MX98741 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| MX98742 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FEBC 100 Base Fast Ethernet Bridge Controller |
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