- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359265 > MX98727 SINGLE CHIP PCI/CARDBUS FAST ETHERNET CONTROLLER PDF資料下載
參數(shù)資料
| 型號： | MX98727 |
| 英文描述： | SINGLE CHIP PCI/CARDBUS FAST ETHERNET CONTROLLER |
| 中文描述： | 單芯片的PCI / CARDBUS快速以太網(wǎng)控制器 |
| 文件頁數(shù)： | 16/71頁 |
| 文件大?。?/td> | 389K |
| 代理商： | MX98727 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當(dāng)前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁
16
P/N:PM0723
REV. 1.0, JUL. 13, 2000
MX98728EC
Receive Buffer Write Page Pointer Register: RWP (Reg17h/16h), R/W, default=x000h
Bit
16.7-0,
17.3-0
Symbol
RWP[11:0]
Description
Receive Buffer Write Page Pointer: Current receive write page pointer. The MSB
is the Reg17h.3 bit. The LSB is the Reg16h.0 bit. This register is controlled by
GMAC only. An internal Byte Counter (RWPBC) is associated with this page
register.
Receive Buffer Read Page Pointer Register: RRP ( Reg19h/18h), R/W, default=0000h
Bit
18.7-0,
19.3-0
Symbol
RRP[11:0]
Description
Receive buffer Read Page Pointer: Current receive read page pointer. RRP[11:0]
is mapped to MA[19:8]. The MSB is the Reg19h.3 bit. The LSB is the Reg18h.0
bit. This register is normally controlled by the device driver. An internal Byte
Counter (RRPBC) is associated with this page register.
RX High Boundary Page Pointer Register: RHBP Reg.1Bh/1Ah, R/W, default=x000h
Bit
1A.7-0.
1B.3-0
Symbol
RHBP[11:0]
Description
Receive High Boundary Page Pointer : The RX packet buffer is defined as
between RHBP [11:0] and BP[11:0]. The MSB is the Reg1Bh.3 bit. The LSB is
Reg1Ah.0 bit.
Receive Interrupt Timer: RXINTT (Reg15h/14h), R/W, default=0000h
Bit
14.7-0,
15.7-0
Symbol
RXINTT[7:0],
RXINTT[15:8]
Description
Receive Interrupt Timer: Default is 0000h, meaning no time-out is used on the RI
or the REI interrupt assertion. Reg15h.7 is the RXINTT.15 bit. Reg14h.0 is
the RXINTT.0 bit. Any non-zero value enables the time out function if RXINTC[1:0]
(Reg01h.[7:6] ) > 0. The time unit of this counter is 40ns per count. The possible
timeout period ranges from 40ns to 2622 us. When the RXINTT times out, if the
received packet count has not reached the RXINTC [1:0], an interrupt will be
generated (which is caused by the RXINTT timeout alone). Depending on the
Reg50.4 bit, RXINTT will start counting after the end of the last receive
packet of either the host DMA or the RX local DMA. See waveform diagram about
"RXINTT start time definifion."
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MX98742 | FEBC 100 Base Fast Ethernet Bridge Controller |
| MX98902A(PLCC) | LAN Node Controller |
| MX98902A(PQFP) | LAN Node Controller |
| MX98902A(SQFP) | LAN Node Controller |
| MX99011MC | Interface IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MX98728 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION |
| MX98728AEC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Controller Miscellaneous - Datasheet Reference |
| MX98728EC | 制造商:MCNIX 制造商全稱:Macronix International 功能描述:GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION |
| MX98741 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| MX98742 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FEBC 100 Base Fast Ethernet Bridge Controller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。